diff options
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.h | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 19 |
3 files changed, 19 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index 87b547ec211..da615802262 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -785,6 +785,8 @@ static const struct debug_named_value common_debug_options[] = { { "nodccfb", DBG(NO_DCC_FB), "Disable separate DCC on the main framebuffer" }, { "nodpbb", DBG(NO_DPBB), "Disable DPBB." }, { "nodfsm", DBG(NO_DFSM), "Disable DFSM." }, + { "dpbb", DBG(DPBB), "Enable DPBB." }, + { "dfsm", DBG(DFSM), "Enable DFSM." }, { "nooutoforder", DBG(NO_OUT_OF_ORDER), "Disable out-of-order rasterization" }, DEBUG_NAMED_VALUE_END /* must be last */ diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index ebee7c49667..e3cb1cfb106 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -113,6 +113,8 @@ enum { DBG_NO_OUT_OF_ORDER, DBG_NO_DPBB, DBG_NO_DFSM, + DBG_DPBB, + DBG_DFSM, DBG_NO_HYPERZ, DBG_NO_RB_PLUS, DBG_NO_2D_TILING, diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index e98e4fef926..d0b90e732ad 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -1072,10 +1072,21 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws, sscreen->b.family <= CHIP_POLARIS12) || sscreen->b.family == CHIP_VEGA10 || sscreen->b.family == CHIP_RAVEN; - sscreen->dpbb_allowed = sscreen->b.chip_class >= GFX9 && - !(sscreen->b.debug_flags & DBG(NO_DPBB)); - sscreen->dfsm_allowed = sscreen->dpbb_allowed && - !(sscreen->b.debug_flags & DBG(NO_DFSM)); + + if (sscreen->b.debug_flags & DBG(DPBB)) { + sscreen->dpbb_allowed = true; + } else { + /* Only enable primitive binning on Raven by default. */ + sscreen->dpbb_allowed = sscreen->b.family == CHIP_RAVEN && + !(sscreen->b.debug_flags & DBG(NO_DPBB)); + } + + if (sscreen->b.debug_flags & DBG(DFSM)) { + sscreen->dfsm_allowed = sscreen->dpbb_allowed; + } else { + sscreen->dfsm_allowed = sscreen->dpbb_allowed && + !(sscreen->b.debug_flags & DBG(NO_DFSM)); + } /* While it would be nice not to have this flag, we are constrained * by the reality that LLVM 5.0 doesn't have working VGPR indexing |