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-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_strings.c1
-rw-r--r--src/gallium/drivers/radeonsi/gfx10_shader_ngg.c4
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.c4
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.h3
-rw-r--r--src/gallium/drivers/radeonsi/si_shaderlib_tgsi.c2
-rw-r--r--src/gallium/drivers/radeonsi/si_state_shaders.c14
-rw-r--r--src/gallium/include/pipe/p_shader_tokens.h1
7 files changed, 14 insertions, 15 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_strings.c b/src/gallium/auxiliary/tgsi/tgsi_strings.c
index 887d2271dc1..b997b53fa6e 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_strings.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_strings.c
@@ -159,6 +159,7 @@ const char *tgsi_property_names[TGSI_PROPERTY_COUNT] =
"CS_FIXED_BLOCK_HEIGHT",
"CS_FIXED_BLOCK_DEPTH",
"MUL_ZERO_WINS",
+ "VS_BLIT_SGPRS_AMD",
};
const char *tgsi_return_type_names[TGSI_RETURN_TYPE_COUNT] =
diff --git a/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c b/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c
index 27be0661006..6c9231fe533 100644
--- a/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c
+++ b/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c
@@ -600,7 +600,7 @@ void gfx10_emit_ngg_epilogue(struct ac_shader_abi *abi,
LLVMValueRef num_vertices_val;
if (ctx->type == PIPE_SHADER_VERTEX) {
- if (info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS]) {
+ if (info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD]) {
/* Blits always use axis-aligned rectangles with 3 vertices. */
num_vertices = 3;
num_vertices_val = LLVMConstInt(ctx->i32, 3, 0);
@@ -689,7 +689,7 @@ void gfx10_emit_ngg_epilogue(struct ac_shader_abi *abi,
/* Update query buffer */
/* TODO: this won't catch 96-bit clear_buffer via transform feedback. */
- if (!info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS]) {
+ if (!info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD]) {
tmp = si_unpack_param(ctx, ctx->param_vs_state_bits, 6, 1);
tmp = LLVMBuildTrunc(builder, tmp, ctx->i1, "");
ac_build_ifcc(&ctx->ac, tmp, 5029); /* if (STREAMOUT_QUERY_ENABLED) */
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 8dd608b5378..e191a4a9631 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -442,7 +442,7 @@ void si_llvm_load_input_vs(
LLVMValueRef out[4])
{
const struct tgsi_shader_info *info = &ctx->shader->selector->info;
- unsigned vs_blit_property = info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS];
+ unsigned vs_blit_property = info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
if (vs_blit_property) {
LLVMValueRef vertex_id = ctx->abi.vertex_id;
@@ -4662,7 +4662,7 @@ static void create_function(struct si_shader_context *ctx)
unsigned num_prolog_vgprs = 0;
unsigned type = ctx->type;
unsigned vs_blit_property =
- shader->selector->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS];
+ shader->selector->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
si_init_function_info(&fninfo);
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index 3ce3d4e824a..c942bd20ee7 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -273,9 +273,6 @@ enum {
/* The number of used user data dwords in the range [1, 4]. */
TGSI_PROPERTY_CS_USER_DATA_DWORDS = TGSI_PROPERTY_FS_COORD_PIXEL_CENTER,
- /* Use a property enum that VS wouldn't use. */
- TGSI_PROPERTY_VS_BLIT_SGPRS = TGSI_PROPERTY_FS_COORD_ORIGIN,
-
/* These represent the number of SGPRs the shader uses. */
SI_VS_BLIT_SGPRS_POS = 3,
SI_VS_BLIT_SGPRS_POS_COLOR = 7,
diff --git a/src/gallium/drivers/radeonsi/si_shaderlib_tgsi.c b/src/gallium/drivers/radeonsi/si_shaderlib_tgsi.c
index 15bb475d89a..fcd885c080f 100644
--- a/src/gallium/drivers/radeonsi/si_shaderlib_tgsi.c
+++ b/src/gallium/drivers/radeonsi/si_shaderlib_tgsi.c
@@ -61,7 +61,7 @@ void *si_get_blitter_vs(struct si_context *sctx, enum blitter_attrib_type type,
return NULL;
/* Tell the shader to load VS inputs from SGPRs: */
- ureg_property(ureg, TGSI_PROPERTY_VS_BLIT_SGPRS, vs_blit_property);
+ ureg_property(ureg, TGSI_PROPERTY_VS_BLIT_SGPRS_AMD, vs_blit_property);
ureg_property(ureg, TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION, true);
/* This is just a pass-through shader with 1-3 MOV instructions. */
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 18cdc989cf8..2ee069b90e0 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1108,9 +1108,9 @@ static void gfx10_shader_ngg(struct si_screen *sscreen, struct si_shader *shader
/* VGPR5-8: (VertexID, UserVGPR0, UserVGPR1, UserVGPR2 / InstanceID) */
es_vgpr_comp_cnt = shader->info.uses_instanceid ? 3 : 0;
- if (es_info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS]) {
+ if (es_info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD]) {
num_user_sgprs = SI_SGPR_VS_BLIT_DATA +
- es_info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS];
+ es_info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
} else {
num_user_sgprs = si_get_num_vs_user_sgprs(GFX9_VSGS_NUM_USER_SGPR);
}
@@ -1365,9 +1365,9 @@ static void si_shader_vs(struct si_screen *sscreen, struct si_shader *shader,
vgpr_comp_cnt = enable_prim_id ? 2 : (shader->info.uses_instanceid ? 1 : 0);
}
- if (info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS]) {
+ if (info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD]) {
num_user_sgprs = SI_SGPR_VS_BLIT_DATA +
- info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS];
+ info->properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
} else {
num_user_sgprs = si_get_num_vs_user_sgprs(SI_VS_NUM_USER_SGPR);
}
@@ -1703,7 +1703,7 @@ void si_shader_selector_key_vs(struct si_context *sctx,
struct si_vs_prolog_bits *prolog_key)
{
if (!sctx->vertex_elements ||
- vs->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS])
+ vs->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD])
return;
struct si_vertex_elements *elts = sctx->vertex_elements;
@@ -2680,7 +2680,7 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
/* The prolog is a no-op if there are no inputs. */
sel->vs_needs_prolog = sel->type == PIPE_SHADER_VERTEX &&
sel->info.num_inputs &&
- !sel->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS];
+ !sel->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
sel->force_correct_derivs_after_kill =
sel->type == PIPE_SHADER_FRAGMENT &&
@@ -2972,7 +2972,7 @@ static void si_bind_vs_shader(struct pipe_context *ctx, void *state)
sctx->vs_shader.cso = sel;
sctx->vs_shader.current = sel ? sel->first_variant : NULL;
- sctx->num_vs_blit_sgprs = sel ? sel->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS] : 0;
+ sctx->num_vs_blit_sgprs = sel ? sel->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD] : 0;
si_update_common_shader_state(sctx);
si_update_vs_viewport_state(sctx);
diff --git a/src/gallium/include/pipe/p_shader_tokens.h b/src/gallium/include/pipe/p_shader_tokens.h
index e708f68745f..0c5ee580fb0 100644
--- a/src/gallium/include/pipe/p_shader_tokens.h
+++ b/src/gallium/include/pipe/p_shader_tokens.h
@@ -301,6 +301,7 @@ enum tgsi_property_name {
TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT,
TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH,
TGSI_PROPERTY_MUL_ZERO_WINS,
+ TGSI_PROPERTY_VS_BLIT_SGPRS_AMD,
TGSI_PROPERTY_COUNT,
};
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-13 01:40:20 +0000