diff options
| -rw-r--r-- | src/panfrost/midgard/midgard_ra.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/src/panfrost/midgard/midgard_ra.c b/src/panfrost/midgard/midgard_ra.c index 88795a777f5..8167340a340 100644 --- a/src/panfrost/midgard/midgard_ra.c +++ b/src/panfrost/midgard/midgard_ra.c @@ -435,6 +435,20 @@ mir_compute_interference( } } +static bool +mir_is_64(midgard_instruction *ins) +{ + if (nir_alu_type_get_type_size(ins->dest_type) == 64) + return true; + + mir_foreach_src(ins, v) { + if (nir_alu_type_get_type_size(ins->src_types[v]) == 64) + return true; + } + + return false; +} + /* This routine performs the actual register allocation. It should be succeeded * by install_registers */ @@ -488,7 +502,7 @@ allocate_registers(compiler_context *ctx, bool *spilled) * but once we get RA we shouldn't disrupt this further. Align * sources of 64-bit instructions. */ - if (ins->type == TAG_ALU_4 && ins->alu.reg_mode == midgard_reg_mode_64) { + if (ins->type == TAG_ALU_4 && mir_is_64(ins)) { mir_foreach_src(ins, v) { unsigned s = ins->src[v]; |