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-rw-r--r--src/gallium/drivers/iris/iris_clear.c1
-rw-r--r--src/intel/blorp/blorp.h3
-rw-r--r--src/intel/blorp/blorp_clear.c9
-rw-r--r--src/intel/vulkan/anv_blorp.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.c1
5 files changed, 14 insertions, 4 deletions
diff --git a/src/gallium/drivers/iris/iris_clear.c b/src/gallium/drivers/iris/iris_clear.c
index 087b32f7180..0639b32e9f6 100644
--- a/src/gallium/drivers/iris/iris_clear.c
+++ b/src/gallium/drivers/iris/iris_clear.c
@@ -315,6 +315,7 @@ fast_clear_color(struct iris_context *ice,
* conversion in convert_fast_clear_color().
*/
blorp_fast_clear(&blorp_batch, &surf, isl_format_srgb_to_linear(format),
+ ISL_SWIZZLE_IDENTITY,
level, box->z, box->depth,
box->x, box->y, box->x + box->width,
box->y + box->height);
diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
index 9ab537177fb..dd31ef2e2dc 100644
--- a/src/intel/blorp/blorp.h
+++ b/src/intel/blorp/blorp.h
@@ -166,7 +166,8 @@ swizzle_color_value(union isl_color_value src, struct isl_swizzle swizzle);
void
blorp_fast_clear(struct blorp_batch *batch,
- const struct blorp_surf *surf, enum isl_format format,
+ const struct blorp_surf *surf,
+ enum isl_format format, struct isl_swizzle swizzle,
uint32_t level, uint32_t start_layer, uint32_t num_layers,
uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1);
diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index 6999101c58e..e95f30b747d 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -334,7 +334,8 @@ get_fast_clear_rect(const struct isl_device *dev,
void
blorp_fast_clear(struct blorp_batch *batch,
- const struct blorp_surf *surf, enum isl_format format,
+ const struct blorp_surf *surf,
+ enum isl_format format, struct isl_swizzle swizzle,
uint32_t level, uint32_t start_layer, uint32_t num_layers,
uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1)
{
@@ -360,6 +361,12 @@ blorp_fast_clear(struct blorp_batch *batch,
start_layer, format, true);
params.num_samples = params.dst.surf.samples;
+ /* If a swizzle was provided, we need to swizzle the clear color so that
+ * the hardware color format conversion will work properly.
+ */
+ params.dst.clear_color = swizzle_color_value(params.dst.clear_color,
+ swizzle);
+
batch->blorp->exec(batch, &params);
}
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 8cbe6aaaa89..0409ef099ea 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -1782,7 +1782,7 @@ anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer,
switch (mcs_op) {
case ISL_AUX_OP_FAST_CLEAR:
- blorp_fast_clear(&batch, &surf, format,
+ blorp_fast_clear(&batch, &surf, format, ISL_SWIZZLE_IDENTITY,
0, base_layer, layer_count,
0, 0, image->extent.width, image->extent.height);
break;
@@ -1863,7 +1863,7 @@ anv_image_ccs_op(struct anv_cmd_buffer *cmd_buffer,
switch (ccs_op) {
case ISL_AUX_OP_FAST_CLEAR:
- blorp_fast_clear(&batch, &surf, format,
+ blorp_fast_clear(&batch, &surf, format, ISL_SWIZZLE_IDENTITY,
level, base_layer, layer_count,
0, 0, level_width, level_height);
break;
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 93ca63ff1a2..43363e5f63c 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -1307,6 +1307,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
struct blorp_batch batch;
blorp_batch_init(&brw->blorp, &batch, brw, 0);
blorp_fast_clear(&batch, &surf, isl_format_srgb_to_linear(isl_format),
+ ISL_SWIZZLE_IDENTITY,
level, irb->mt_layer, num_layers, x0, y0, x1, y1);
blorp_batch_finish(&batch);