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-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.c10
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c4
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c68
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.h7
4 files changed, 26 insertions, 63 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index b0fbb64ce38..fdaf4293c19 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -287,8 +287,6 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_layer);
intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_layer);
- intel_miptree_prepare_mcs(brw, dst_mt);
-
DBG("%s from %dx %s mt %p %d %d (%f,%f) (%f,%f)"
"to %dx %s mt %p %d %d (%f,%f) (%f,%f) (flip %d,%d)\n",
__func__,
@@ -689,6 +687,9 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
!brw_is_color_fast_clear_compatible(brw, irb->mt, &ctx->Color.ClearColor))
can_fast_clear = false;
+ const bool is_lossless_compressed = intel_miptree_is_lossless_compressed(
+ brw, irb->mt);
+
if (can_fast_clear) {
/* Record the clear color in the miptree so that it will be
* programmed in SURFACE_STATE by later rendering and resolve
@@ -708,7 +709,8 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
* it now.
*/
if (!irb->mt->mcs_mt) {
- if (!intel_miptree_alloc_non_msrt_mcs(brw, irb->mt)) {
+ assert(!is_lossless_compressed);
+ if (!intel_miptree_alloc_non_msrt_mcs(brw, irb->mt, false)) {
/* MCS allocation failed--probably this will only happen in
* out-of-memory conditions. But in any case, try to recover
* by falling back to a non-blorp clear technique.
@@ -757,7 +759,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
clear_color, color_write_disable);
blorp_batch_finish(&batch);
- if (intel_miptree_is_lossless_compressed(brw, irb->mt)) {
+ if (is_lossless_compressed) {
/* Compressed buffers can be cleared also using normal rep-clear. In
* such case they behave such as if they were drawn using normal 3D
* render pipeline, and we simply mark the mcs as dirty.
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index 9b1e18c51cf..cab67c94e1c 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -409,8 +409,8 @@ brw_predraw_set_aux_buffers(struct brw_context *brw)
struct intel_renderbuffer *irb =
intel_renderbuffer(fb->_ColorDrawBuffers[i]);
- if (irb) {
- intel_miptree_prepare_mcs(brw, irb->mt);
+ if (!irb) {
+ continue;
}
}
}
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 7b971839a0a..427657c8771 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -789,6 +789,20 @@ intel_miptree_create(struct brw_context *brw,
intel_miptree_supports_non_msrt_fast_clear(brw, mt)) {
mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED;
assert(brw->gen < 8 || mt->halign == 16 || num_samples <= 1);
+
+ /* On Gen9+ clients are not currently capable of consuming compressed
+ * single-sampled buffers. Disabling compression allows us to skip
+ * resolves.
+ */
+ const bool lossless_compression_disabled = INTEL_DEBUG & DEBUG_NO_RBC;
+ const bool is_lossless_compressed =
+ unlikely(!lossless_compression_disabled) &&
+ brw->gen >= 9 && !mt->is_scanout &&
+ intel_miptree_supports_lossless_compressed(brw, mt);
+
+ if (is_lossless_compressed) {
+ intel_miptree_alloc_non_msrt_mcs(brw, mt, is_lossless_compressed);
+ }
}
return mt;
@@ -1563,7 +1577,8 @@ intel_miptree_alloc_mcs(struct brw_context *brw,
bool
intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
- struct intel_mipmap_tree *mt)
+ struct intel_mipmap_tree *mt,
+ bool is_lossless_compressed)
{
assert(mt->mcs_mt == NULL);
assert(!mt->disable_aux_buffers);
@@ -1605,16 +1620,6 @@ intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
layout_flags |= MIPTREE_LAYOUT_FORCE_HALIGN16;
}
- /* On Gen9+ clients are not currently capable of consuming compressed
- * single-sampled buffers. Disabling compression allows us to skip
- * resolves.
- */
- const bool lossless_compression_disabled = INTEL_DEBUG & DEBUG_NO_RBC;
- const bool is_lossless_compressed =
- unlikely(!lossless_compression_disabled) &&
- brw->gen >= 9 && !mt->is_scanout &&
- intel_miptree_supports_lossless_compressed(brw, mt);
-
/* In case of compression mcs buffer needs to be initialised requiring the
* buffer to be immediately mapped to cpu space for writing. Therefore do
* not use the gpu access flag which can cause an unnecessary delay if the
@@ -1656,47 +1661,6 @@ intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
return mt->mcs_mt;
}
-void
-intel_miptree_prepare_mcs(struct brw_context *brw,
- struct intel_mipmap_tree *mt)
-{
- if (mt->mcs_mt)
- return;
-
- if (brw->gen < 9)
- return;
-
- /* Single sample compression is represented re-using msaa compression
- * layout type: "Compressed Multisampled Surfaces".
- */
- if (mt->msaa_layout != INTEL_MSAA_LAYOUT_CMS || mt->num_samples > 1)
- return;
-
- /* Clients are not currently capable of consuming compressed
- * single-sampled buffers.
- */
- if (mt->is_scanout)
- return;
-
- assert(intel_tiling_supports_non_msrt_mcs(brw, mt->tiling) ||
- intel_miptree_supports_lossless_compressed(brw, mt));
-
- /* Consider if lossless compression is supported but the needed
- * auxiliary buffer doesn't exist yet.
- *
- * Failing to allocate the auxiliary buffer means running out of
- * memory. The pointer to the aux miptree is left NULL which should
- * signal non-compressed behavior.
- */
- if (!intel_miptree_alloc_non_msrt_mcs(brw, mt)) {
- _mesa_warning(NULL,
- "Failed to allocated aux buffer for lossless"
- " compressed %p %u:%u %s\n",
- mt, mt->logical_width0, mt->logical_height0,
- _mesa_get_format_name(mt->format));
- }
-}
-
/**
* Helper for intel_miptree_alloc_hiz() that sets
* \c mt->level[level].has_hiz. Return true if and only if
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 07db51b305e..2f1b8ebf0e1 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -709,11 +709,8 @@ intel_miptree_supports_lossless_compressed(struct brw_context *brw,
bool
intel_miptree_alloc_non_msrt_mcs(struct brw_context *brw,
- struct intel_mipmap_tree *mt);
-
-void
-intel_miptree_prepare_mcs(struct brw_context *brw,
- struct intel_mipmap_tree *mt);
+ struct intel_mipmap_tree *mt,
+ bool is_lossless_compressed);
enum {
MIPTREE_LAYOUT_ACCELERATED_UPLOAD = 1 << 0,
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-30 12:29:44 +0000