diff options
| -rw-r--r-- | src/amd/compiler/aco_ir.h | 4 | ||||
| -rw-r--r-- | src/amd/compiler/aco_lower_to_hw_instr.cpp | 45 |
2 files changed, 34 insertions, 15 deletions
diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h index a165a1681ad..8adbd567c01 100644 --- a/src/amd/compiler/aco_ir.h +++ b/src/amd/compiler/aco_ir.h @@ -142,6 +142,10 @@ struct float_mode { unsigned denorm32:2; unsigned denorm16_64:2; }; + struct { + uint8_t round:4; + uint8_t denorm:4; + }; uint8_t val = 0; }; /* if false, optimizations which may remove infs/nan/-0.0 can be done */ diff --git a/src/amd/compiler/aco_lower_to_hw_instr.cpp b/src/amd/compiler/aco_lower_to_hw_instr.cpp index f052f7ed792..f3903777257 100644 --- a/src/amd/compiler/aco_lower_to_hw_instr.cpp +++ b/src/amd/compiler/aco_lower_to_hw_instr.cpp @@ -1637,6 +1637,21 @@ void handle_operands(std::map<PhysReg, copy_operation>& copy_map, lower_context* ctx->program->statistics[statistic_copies] += ctx->instructions.size() - num_instructions_before; } +void emit_set_mode(Builder& bld, float_mode new_mode, bool set_round, bool set_denorm) +{ + if (bld.program->chip_class >= GFX10) { + if (set_round) + bld.sopp(aco_opcode::s_round_mode, -1, new_mode.round); + if (set_denorm) + bld.sopp(aco_opcode::s_denorm_mode, -1, new_mode.denorm); + } else if (set_round || set_denorm) { + /* "((size - 1) << 11) | register" (MODE is encoded as register 1) */ + Instruction *instr = bld.sopk(aco_opcode::s_setreg_imm32_b32, Operand(new_mode.val), (7 << 11) | 1).instr; + /* has to be a literal */ + instr->operands[0].setFixed(PhysReg{255}); + } +} + void lower_to_hw_instr(Program* program) { Block *discard_block = NULL; @@ -1648,23 +1663,23 @@ void lower_to_hw_instr(Program* program) ctx.program = program; Builder bld(program, &ctx.instructions); - bool set_mode = i == 0 && block->fp_mode.val != program->config->float_mode; - for (unsigned pred : block->linear_preds) { - if (program->blocks[pred].fp_mode.val != block->fp_mode.val) { - set_mode = true; - break; + float_mode config_mode; + config_mode.val = program->config->float_mode; + + bool set_round = i == 0 && block->fp_mode.round != config_mode.round; + bool set_denorm = i == 0 && block->fp_mode.denorm != config_mode.denorm; + if (block->kind & block_kind_top_level) { + for (unsigned pred : block->linear_preds) { + if (program->blocks[pred].fp_mode.round != block->fp_mode.round) + set_round = true; + if (program->blocks[pred].fp_mode.denorm != block->fp_mode.denorm) + set_denorm = true; } } - if (set_mode) { - /* only allow changing modes at top-level blocks so this doesn't break - * the "jump over empty blocks" optimization */ - assert(block->kind & block_kind_top_level); - uint32_t mode = block->fp_mode.val; - /* "((size - 1) << 11) | register" (MODE is encoded as register 1) */ - Instruction *instr = bld.sopk(aco_opcode::s_setreg_imm32_b32, Operand(mode), (7 << 11) | 1).instr; - /* has to be a literal */ - instr->operands[0].setFixed(PhysReg{255}); - } + /* only allow changing modes at top-level blocks so this doesn't break + * the "jump over empty blocks" optimization */ + assert((!set_round && !set_denorm) || (block->kind & block_kind_top_level)); + emit_set_mode(bld, block->fp_mode, set_round, set_denorm); for (size_t j = 0; j < block->instructions.size(); j++) { aco_ptr<Instruction>& instr = block->instructions[j]; |