diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_misc_state.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_misc_state.c | 2 |
2 files changed, 0 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 726d8d80af4..f9652df2d72 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -330,8 +330,6 @@ static void emit_depthbuffer(struct brw_context *brw) * Section 7.5.5.1.1 3DSTATE_DEPTH_BUFFER, Bit 1.27 Tiled Surface: * [DevGT+]: This field must be set to TRUE. */ - struct intel_region *region = stencil_mt->region; - assert(intel->has_separate_stencil); BEGIN_BATCH(len); diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c index d7a3dae571a..8a383f5ed12 100644 --- a/src/mesa/drivers/dri/i965/gen7_misc_state.c +++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c @@ -69,8 +69,6 @@ static void emit_depthbuffer(struct brw_context *brw) if (stencil_mt == NULL) { dw1 |= (BRW_SURFACE_NULL << 29); } else { - struct intel_region *region = stencil_mt->region; - /* _NEW_STENCIL: enable stencil buffer writes */ dw1 |= ((ctx->Stencil.WriteMask != 0) << 27); |