diff options
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.h | 4 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 4 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_shaders.c | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h index 3400a03d7bb..f089dc73ca1 100644 --- a/src/gallium/drivers/radeonsi/si_shader.h +++ b/src/gallium/drivers/radeonsi/si_shader.h @@ -290,8 +290,8 @@ struct si_shader { bool is_gs_copy_shader; bool dx10_clamp_mode; /* convert NaNs to 0 */ - unsigned ls_rsrc1; - unsigned ls_rsrc2; + unsigned rsrc1; + unsigned rsrc2; }; static inline struct tgsi_shader_info *si_get_vs_info(struct si_context *sctx) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 753abc8c103..771d206b9cc 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -163,7 +163,7 @@ static void si_emit_derived_tess_state(struct si_context *sctx, perpatch_output_offset = output_patch0_offset + pervertex_output_patch_size; lds_size = output_patch0_offset + output_patch_size * *num_patches; - ls_rsrc2 = ls->current->ls_rsrc2; + ls_rsrc2 = ls->current->rsrc2; if (sctx->b.chip_class >= CIK) { assert(lds_size <= 65536); @@ -178,7 +178,7 @@ static void si_emit_derived_tess_state(struct si_context *sctx, if (sctx->b.chip_class == CIK && sctx->b.family != CHIP_HAWAII) radeon_set_sh_reg(cs, R_00B52C_SPI_SHADER_PGM_RSRC2_LS, ls_rsrc2); radeon_set_sh_reg_seq(cs, R_00B528_SPI_SHADER_PGM_RSRC1_LS, 2); - radeon_emit(cs, ls->current->ls_rsrc1); + radeon_emit(cs, ls->current->rsrc1); radeon_emit(cs, ls_rsrc2); /* Compute userdata SGPRs. */ diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index 7f6511cf01b..ca6b4be3b0b 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -121,11 +121,11 @@ static void si_shader_ls(struct si_shader *shader) si_pm4_set_reg(pm4, R_00B520_SPI_SHADER_PGM_LO_LS, va >> 8); si_pm4_set_reg(pm4, R_00B524_SPI_SHADER_PGM_HI_LS, va >> 40); - shader->ls_rsrc1 = S_00B528_VGPRS((shader->num_vgprs - 1) / 4) | + shader->rsrc1 = S_00B528_VGPRS((shader->num_vgprs - 1) / 4) | S_00B528_SGPRS((num_sgprs - 1) / 8) | S_00B528_VGPR_COMP_CNT(vgpr_comp_cnt) | S_00B528_DX10_CLAMP(shader->dx10_clamp_mode); - shader->ls_rsrc2 = S_00B52C_USER_SGPR(num_user_sgprs) | + shader->rsrc2 = S_00B52C_USER_SGPR(num_user_sgprs) | S_00B52C_SCRATCH_EN(shader->scratch_bytes_per_wave > 0); } |