diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 13 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_pass2.c | 14 |
2 files changed, 25 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 90dddce8670..e8ee0cb8f7e 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -954,11 +954,22 @@ fs_visitor::calculate_urb_setup() } else { /* FINISHME: The sf doesn't map VS->FS inputs for us very well. */ for (unsigned int i = 0; i < VERT_RESULT_MAX; i++) { + /* Point size is packed into the header, not as a general attribute */ + if (i == VERT_RESULT_PSIZ) + continue; + if (c->key.vp_outputs_written & BITFIELD64_BIT(i)) { int fp_index = _mesa_vert_result_to_frag_attrib((gl_vert_result) i); + /* The back color slot is skipped when the front color is + * also written to. In addition, some slots can be + * written in the vertex shader and not read in the + * fragment shader. So the register number must always be + * incremented, mapped or not. + */ if (fp_index >= 0) - urb_setup[fp_index] = urb_next++; + urb_setup[fp_index] = urb_next; + urb_next++; } } diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass2.c b/src/mesa/drivers/dri/i965/brw_wm_pass2.c index 27c0a94fab8..562a189251e 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass2.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass2.c @@ -93,12 +93,24 @@ static void init_registers( struct brw_wm_compile *c ) } } else { for (j = 0; j < VERT_RESULT_MAX; j++) { + /* Point size is packed into the header, not as a general attribute */ + if (j == VERT_RESULT_PSIZ) + continue; + if (c->key.vp_outputs_written & BITFIELD64_BIT(j)) { int fp_index = _mesa_vert_result_to_frag_attrib(j); nr_interp_regs++; + + /* The back color slot is skipped when the front color is + * also written to. In addition, some slots can be + * written in the vertex shader and not read in the + * fragment shader. So the register number must always be + * incremented, mapped or not. + */ if (fp_index >= 0) - prealloc_reg(c, &c->payload.input_interp[fp_index], i++); + prealloc_reg(c, &c->payload.input_interp[fp_index], i); + i++; } } assert(nr_interp_regs >= 1); |