diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_surface_state.c | 16 |
1 files changed, 2 insertions, 14 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index 22ffa78d01f..594e53122c6 100644 --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c @@ -83,18 +83,6 @@ horizontal_alignment(struct intel_mipmap_tree *mt) } } -static uint32_t -surface_num_multisamples(unsigned num_samples) -{ - assert(num_samples >= 0 && num_samples <= 16); - - if (num_samples == 0) - return GEN7_SURFACE_MULTISAMPLECOUNT_1; - - /* The SURFACE_MULTISAMPLECOUNT_X enums are simply log2(num_samples) << 3. */ - return (ffs(num_samples) - 1) << 3; -} - static void gen8_emit_buffer_surface_state(struct brw_context *brw, uint32_t *out_offset, @@ -180,7 +168,7 @@ gen8_update_texture_surface(struct gl_context *ctx, surf[3] = SET_FIELD(mt->logical_depth0 - 1, BRW_SURFACE_DEPTH) | (mt->region->pitch - 1); - surf[4] = surface_num_multisamples(mt->num_samples); + surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout); surf[5] = SET_FIELD(tObj->BaseLevel - mt->first_level, GEN7_SURFACE_MIN_LOD) | (intelObj->_MaxLevel - tObj->BaseLevel); /* mip count */ @@ -322,7 +310,7 @@ gen8_update_renderbuffer_surface(struct brw_context *brw, surf[3] = (depth - 1) << BRW_SURFACE_DEPTH_SHIFT | (region->pitch - 1); /* Surface Pitch */ - surf[4] = surface_num_multisamples(mt->num_samples) | + surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout) | min_array_element << GEN7_SURFACE_MIN_ARRAY_ELEMENT_SHIFT | (depth - 1) << GEN7_SURFACE_RENDER_TARGET_VIEW_EXTENT_SHIFT; |