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-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c1
-rw-r--r--src/mesa/drivers/dri/i965/brw_structs.h8
-rw-r--r--src/mesa/drivers/dri/i965/gen6_scissor_state.c3
4 files changed, 8 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index c5d296b1295..3beed16945b 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -102,6 +102,7 @@ extern const struct brw_tracked_state gen6_depth_stencil_state;
extern const struct brw_tracked_state gen6_gs_state;
extern const struct brw_tracked_state gen6_sampler_state;
extern const struct brw_tracked_state gen6_scissor_state;
+extern const struct brw_tracked_state gen6_scissor_state_pointers;
extern const struct brw_tracked_state gen6_sf_state;
extern const struct brw_tracked_state gen6_sf_vp;
extern const struct brw_tracked_state gen6_urb;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index e4f36a7ec38..1aadd5ca61d 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -145,6 +145,7 @@ const struct brw_tracked_state *gen6_atoms[] =
&gen6_wm_state,
&gen6_scissor_state,
+ &gen6_scissor_state_pointers,
&brw_state_base_address,
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index 8e8f418eb78..7b919872c40 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -909,10 +909,12 @@ struct brw_sf_unit_state
};
-struct gen6_scissor_state
+struct gen6_scissor_rect
{
- GLuint ymin, xmin;
- GLuint ymax, xmax;
+ GLuint xmin:16;
+ GLuint ymin:16;
+ GLuint xmax:16;
+ GLuint ymax:16;
};
struct brw_gs_unit_state
diff --git a/src/mesa/drivers/dri/i965/gen6_scissor_state.c b/src/mesa/drivers/dri/i965/gen6_scissor_state.c
index 34a9dc234c2..3d483c710ce 100644
--- a/src/mesa/drivers/dri/i965/gen6_scissor_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_scissor_state.c
@@ -35,7 +35,7 @@ prepare_scissor_state(struct brw_context *brw)
{
GLcontext *ctx = &brw->intel.ctx;
const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0);
- struct gen6_scissor_state scissor;
+ struct gen6_scissor_rect scissor;
/* _NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT */
@@ -84,7 +84,6 @@ static void upload_scissor_state_pointers(struct brw_context *brw)
OUT_RELOC(brw->sf.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
ADVANCE_BATCH();
- intel_batchbuffer_emit_mi_flush(intel->batch);
}