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-rw-r--r--src/mesa/drivers/dri/r600/r600_context.h30
-rw-r--r--src/mesa/drivers/dri/r600/r700_chip.c121
-rw-r--r--src/mesa/drivers/dri/r600/r700_render.c6
-rw-r--r--src/mesa/drivers/dri/r600/r700_shader.h1
-rw-r--r--src/mesa/drivers/dri/r600/r700_state.c40
-rw-r--r--src/mesa/drivers/dri/r600/r700_vertprog.c103
-rw-r--r--src/mesa/drivers/dri/r600/r700_vertprog.h8
7 files changed, 41 insertions, 268 deletions
diff --git a/src/mesa/drivers/dri/r600/r600_context.h b/src/mesa/drivers/dri/r600/r600_context.h
index 7f68820fda1..394fd757d4b 100644
--- a/src/mesa/drivers/dri/r600/r600_context.h
+++ b/src/mesa/drivers/dri/r600/r600_context.h
@@ -58,29 +58,6 @@ typedef struct r600_context context_t;
#include "main/mm.h"
-/************ DMA BUFFERS **************/
-
-/* The blit width for texture uploads
- */
-#define R600_BLIT_WIDTH_BYTES 1024
-#define R600_MAX_TEXTURE_UNITS 8
-
-struct r600_texture_state {
- int tc_count; /* number of incoming texture coordinates from VAP */
-};
-
-/* Perhaps more if we store programs in vmem? */
-/* drm_r600_cmd_header_t->vpu->count is unsigned char */
-#define VSF_MAX_FRAGMENT_LENGTH (255*4)
-
-/* Can be tested with colormat currently. */
-#define VSF_MAX_FRAGMENT_TEMPS (14)
-
-#define STATE_R600_WINDOW_DIMENSION (STATE_INTERNAL_DRIVER+0)
-#define STATE_R600_TEXRECT_FACTOR (STATE_INTERNAL_DRIVER+1)
-
-extern int hw_tcl_on;
-
#define COLOR_IS_RGBA
#define TAG(x) r600##x
#include "tnl_dd/t_dd_vertex.h"
@@ -167,9 +144,6 @@ struct r600_context {
/* Vertex buffers
*/
- GLvector4f dummy_attrib[_TNL_ATTRIB_MAX];
- GLvector4f *temp_attrib[_TNL_ATTRIB_MAX];
-
GLint nNumActiveAos;
StreamDesc stream_desc[VERT_ATTRIB_MAX];
struct r700_index_buffer ind_buf;
@@ -203,7 +177,6 @@ extern GLboolean r700SyncSurf(context_t *context,
uint32_t write_domain,
uint32_t sync_type);
-extern void r700SetupStreams(GLcontext * ctx);
extern void r700Start3D(context_t *context);
extern void r600InitAtoms(context_t *context);
extern void r700InitDraw(GLcontext *ctx);
@@ -213,7 +186,4 @@ extern void r700InitDraw(GLcontext *ctx);
#define RADEON_D_PLAYBACK_RAW 2
#define RADEON_D_T 3
-#define r600PackFloat32 radeonPackFloat32
-#define r600PackFloat24 radeonPackFloat24
-
#endif /* __R600_CONTEXT_H__ */
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index 3ebc53d94f8..75b97c56cdb 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -141,77 +141,10 @@ static void r700SendTexBorderColorState(GLcontext *ctx, struct radeon_state_atom
}
}
+extern int getTypeSize(GLenum type);
static void r700SetupVTXConstants(GLcontext * ctx,
- unsigned int nStreamID,
void * pAos,
- unsigned int size, /* number of elements in vector */
- unsigned int stride,
- unsigned int count) /* number of vectors in stream */
-{
- context_t *context = R700_CONTEXT(ctx);
- struct radeon_aos * paos = (struct radeon_aos *)pAos;
- BATCH_LOCALS(&context->radeon);
- radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__);
-
- unsigned int uSQ_VTX_CONSTANT_WORD0_0;
- unsigned int uSQ_VTX_CONSTANT_WORD1_0;
- unsigned int uSQ_VTX_CONSTANT_WORD2_0 = 0;
- unsigned int uSQ_VTX_CONSTANT_WORD3_0 = 0;
- unsigned int uSQ_VTX_CONSTANT_WORD6_0 = 0;
-
- if (!paos->bo)
- return;
-
- if ((context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV610) ||
- (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV620) ||
- (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RS780) ||
- (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RS880) ||
- (context->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV710))
- r700SyncSurf(context, paos->bo, RADEON_GEM_DOMAIN_GTT, 0, TC_ACTION_ENA_bit);
- else
- r700SyncSurf(context, paos->bo, RADEON_GEM_DOMAIN_GTT, 0, VC_ACTION_ENA_bit);
-
- uSQ_VTX_CONSTANT_WORD0_0 = paos->offset;
- uSQ_VTX_CONSTANT_WORD1_0 = count * (size * 4) - 1;
-
- SETfield(uSQ_VTX_CONSTANT_WORD2_0, 0, BASE_ADDRESS_HI_shift, BASE_ADDRESS_HI_mask); /* TODO */
- SETfield(uSQ_VTX_CONSTANT_WORD2_0, stride, SQ_VTX_CONSTANT_WORD2_0__STRIDE_shift,
- SQ_VTX_CONSTANT_WORD2_0__STRIDE_mask);
- SETfield(uSQ_VTX_CONSTANT_WORD2_0, GetSurfaceFormat(GL_FLOAT, size, NULL),
- SQ_VTX_CONSTANT_WORD2_0__DATA_FORMAT_shift,
- SQ_VTX_CONSTANT_WORD2_0__DATA_FORMAT_mask); /* TODO : trace back api for initial data type, not only GL_FLOAT */
- SETfield(uSQ_VTX_CONSTANT_WORD2_0, SQ_NUM_FORMAT_SCALED,
- SQ_VTX_CONSTANT_WORD2_0__NUM_FORMAT_ALL_shift, SQ_VTX_CONSTANT_WORD2_0__NUM_FORMAT_ALL_mask);
- SETbit(uSQ_VTX_CONSTANT_WORD2_0, SQ_VTX_CONSTANT_WORD2_0__FORMAT_COMP_ALL_bit);
-
- SETfield(uSQ_VTX_CONSTANT_WORD3_0, 1, MEM_REQUEST_SIZE_shift, MEM_REQUEST_SIZE_mask);
- SETfield(uSQ_VTX_CONSTANT_WORD6_0, SQ_TEX_VTX_VALID_BUFFER,
- SQ_TEX_RESOURCE_WORD6_0__TYPE_shift, SQ_TEX_RESOURCE_WORD6_0__TYPE_mask);
-
- BEGIN_BATCH_NO_AUTOSTATE(9 + 2);
-
- R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_RESOURCE, 7));
- R600_OUT_BATCH((nStreamID + SQ_FETCH_RESOURCE_VS_OFFSET) * FETCH_RESOURCE_STRIDE);
- R600_OUT_BATCH(uSQ_VTX_CONSTANT_WORD0_0);
- R600_OUT_BATCH(uSQ_VTX_CONSTANT_WORD1_0);
- R600_OUT_BATCH(uSQ_VTX_CONSTANT_WORD2_0);
- R600_OUT_BATCH(uSQ_VTX_CONSTANT_WORD3_0);
- R600_OUT_BATCH(0);
- R600_OUT_BATCH(0);
- R600_OUT_BATCH(uSQ_VTX_CONSTANT_WORD6_0);
- R600_OUT_BATCH_RELOC(uSQ_VTX_CONSTANT_WORD0_0,
- paos->bo,
- uSQ_VTX_CONSTANT_WORD0_0,
- RADEON_GEM_DOMAIN_GTT, 0, 0);
- END_BATCH();
- COMMIT_BATCH();
-
-}
-
-extern int getTypeSize(GLenum type);
-static void r700SetupVTXConstants2(GLcontext * ctx,
- void * pAos,
- StreamDesc * pStreamDesc)
+ StreamDesc * pStreamDesc)
{
context_t *context = R700_CONTEXT(ctx);
struct radeon_aos * paos = (struct radeon_aos *)pAos;
@@ -295,31 +228,6 @@ static void r700SetupVTXConstants2(GLcontext * ctx,
}
-void r700SetupStreams(GLcontext *ctx)
-{
- context_t *context = R700_CONTEXT(ctx);
- struct r700_vertex_program *vp = context->selected_vp;
- TNLcontext *tnl = TNL_CONTEXT(ctx);
- struct vertex_buffer *vb = &tnl->vb;
- unsigned int i, j = 0;
- radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__);
-
- R600_STATECHANGE(context, vtx);
-
- for(i=0; i<VERT_ATTRIB_MAX; i++) {
- if(vp->mesa_program->Base.InputsRead & (1 << i)) {
- rcommon_emit_vector(ctx,
- &context->radeon.tcl.aos[j],
- vb->AttribPtr[i]->data,
- vb->AttribPtr[i]->size,
- vb->AttribPtr[i]->stride,
- vb->Count);
- j++;
- }
- }
- context->radeon.tcl.aos_count = j;
-}
-
static void r700SendVTXState(GLcontext *ctx, struct radeon_state_atom *atom)
{
context_t *context = R700_CONTEXT(ctx);
@@ -343,25 +251,12 @@ static void r700SendVTXState(GLcontext *ctx, struct radeon_state_atom *atom)
COMMIT_BATCH();
for(i=0; i<VERT_ATTRIB_MAX; i++) {
- if(vp->mesa_program->Base.InputsRead & (1 << i))
- {
- if(1 == context->selected_vp->uiVersion)
- {
- /* currently aos are packed */
- r700SetupVTXConstants(ctx,
- i,
- (void*)(&context->radeon.tcl.aos[j]),
- (unsigned int)context->radeon.tcl.aos[j].components,
- (unsigned int)context->radeon.tcl.aos[j].stride * 4,
- (unsigned int)context->radeon.tcl.aos[j].count);
- }
- else
- { /* context->selected_vp->uiVersion == 2 : aos not always packed */
- r700SetupVTXConstants2(ctx,
- (void*)(&context->radeon.tcl.aos[j]),
- &(context->stream_desc[j]));
- }
- j++;
+ if(vp->mesa_program->Base.InputsRead & (1 << i))
+ {
+ r700SetupVTXConstants(ctx,
+ (void*)(&context->radeon.tcl.aos[j]),
+ &(context->stream_desc[j]));
+ j++;
}
}
}
diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c
index c2e7680eaea..3e1ce9fb72f 100644
--- a/src/mesa/drivers/dri/r600/r700_render.c
+++ b/src/mesa/drivers/dri/r600/r700_render.c
@@ -550,7 +550,7 @@ static void r700AlignDataToDword(GLcontext *ctx,
attr->stride = dst_stride;
}
-static void r700SetupStreams2(GLcontext *ctx, const struct gl_client_array *input[], int count)
+static void r700SetupStreams(GLcontext *ctx, const struct gl_client_array *input[], int count)
{
context_t *context = R700_CONTEXT(ctx);
GLuint stride;
@@ -825,7 +825,7 @@ static GLboolean r700TryDrawPrims(GLcontext *ctx,
_tnl_UpdateFixedFunctionProgram(ctx);
r700SetVertexFormat(ctx, arrays, max_index + 1);
/* shaders need to be updated before buffers are validated */
- r700UpdateShaders2(ctx);
+ r700UpdateShaders(ctx);
if (!r600ValidateBuffers(ctx))
return GL_FALSE;
@@ -845,7 +845,7 @@ static GLboolean r700TryDrawPrims(GLcontext *ctx,
+ context->radeon.cmdbuf.cs->cdw;
r700SetupIndexBuffer(ctx, ib);
- r700SetupStreams2(ctx, arrays, max_index + 1);
+ r700SetupStreams(ctx, arrays, max_index + 1);
radeonEmitState(radeon);
diff --git a/src/mesa/drivers/dri/r600/r700_shader.h b/src/mesa/drivers/dri/r600/r700_shader.h
index 997cb05aaf8..c6a058617ec 100644
--- a/src/mesa/drivers/dri/r600/r700_shader.h
+++ b/src/mesa/drivers/dri/r600/r700_shader.h
@@ -128,6 +128,7 @@ typedef struct R700_Shader
//Internal
void AddInstToList(TypedShaderList * plstCFInstructions, R700ShaderInstruction * pInst);
+void TakeInstOutFromList(TypedShaderList * plstCFInstructions, R700ShaderInstruction * pInst);
void ResolveLinks(R700_Shader *pShader);
void Assemble(R700_Shader *pShader);
diff --git a/src/mesa/drivers/dri/r600/r700_state.c b/src/mesa/drivers/dri/r600/r700_state.c
index 3d3c8b958f3..9a6a68a68c6 100644
--- a/src/mesa/drivers/dri/r600/r700_state.c
+++ b/src/mesa/drivers/dri/r600/r700_state.c
@@ -61,12 +61,9 @@ static void r700UpdatePolygonMode(GLcontext * ctx);
static void r700SetPolygonOffsetState(GLcontext * ctx, GLboolean state);
static void r700SetStencilState(GLcontext * ctx, GLboolean state);
-void r700UpdateShaders (GLcontext * ctx) //----------------------------------
+void r700UpdateShaders(GLcontext * ctx)
{
context_t *context = R700_CONTEXT(ctx);
- GLvector4f dummy_attrib[_TNL_ATTRIB_MAX];
- GLvector4f *temp_attrib[_TNL_ATTRIB_MAX];
- int i;
/* should only happenen once, just after context is created */
/* TODO: shouldn't we fallback to sw here? */
@@ -77,40 +74,7 @@ void r700UpdateShaders (GLcontext * ctx) //----------------------------------
r700SelectFragmentShader(ctx);
- if (context->radeon.NewGLState) {
- for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
- /* mat states from state var not array for sw */
- dummy_attrib[i].stride = 0;
- temp_attrib[i] = TNL_CONTEXT(ctx)->vb.AttribPtr[i];
- TNL_CONTEXT(ctx)->vb.AttribPtr[i] = &(dummy_attrib[i]);
- }
-
- _tnl_UpdateFixedFunctionProgram(ctx);
-
- for (i = _TNL_FIRST_MAT; i <= _TNL_LAST_MAT; i++) {
- TNL_CONTEXT(ctx)->vb.AttribPtr[i] = temp_attrib[i];
- }
- }
-
- r700SelectVertexShader(ctx, 1);
- r700UpdateStateParameters(ctx, _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS);
- context->radeon.NewGLState = 0;
-}
-
-void r700UpdateShaders2(GLcontext * ctx)
-{
- context_t *context = R700_CONTEXT(ctx);
-
- /* should only happenen once, just after context is created */
- /* TODO: shouldn't we fallback to sw here? */
- if (!ctx->FragmentProgram._Current) {
- _mesa_fprintf(stderr, "No ctx->FragmentProgram._Current!!\n");
- return;
- }
-
- r700SelectFragmentShader(ctx);
-
- r700SelectVertexShader(ctx, 2);
+ r700SelectVertexShader(ctx);
r700UpdateStateParameters(ctx, _NEW_PROGRAM | _NEW_PROGRAM_CONSTANTS);
context->radeon.NewGLState = 0;
}
diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.c b/src/mesa/drivers/dri/r600/r700_vertprog.c
index 65c2c3f8114..c84b0ac0597 100644
--- a/src/mesa/drivers/dri/r600/r700_vertprog.c
+++ b/src/mesa/drivers/dri/r600/r700_vertprog.c
@@ -203,22 +203,11 @@ void Map_Vertex_Program(GLcontext *ctx,
pAsm->number_used_registers += num_inputs;
// Create VFETCH instructions for inputs
- if(1 == vp->uiVersion)
- {
- if (GL_TRUE != Process_Vertex_Program_Vfetch_Instructions(vp, mesa_vp) )
- {
- radeon_error("Calling Process_Vertex_Program_Vfetch_Instructions return error. \n");
- return;
- }
- }
- else
- {
- if (GL_TRUE != Process_Vertex_Program_Vfetch_Instructions2(ctx, vp, mesa_vp) )
- {
- radeon_error("Calling Process_Vertex_Program_Vfetch_Instructions2 return error. \n");
- return;
- }
- }
+ if (GL_TRUE != Process_Vertex_Program_Vfetch_Instructions2(ctx, vp, mesa_vp) )
+ {
+ radeon_error("Calling Process_Vertex_Program_Vfetch_Instructions2 return error. \n");
+ return;
+ }
// Map Outputs
pAsm->number_of_exports = Map_Vertex_Output(pAsm, mesa_vp, pAsm->number_used_registers);
@@ -228,7 +217,7 @@ void Map_Vertex_Program(GLcontext *ctx,
pAsm->number_used_registers += pAsm->number_of_exports;
pAsm->pucOutMask = (unsigned char*) MALLOC(pAsm->number_of_exports);
-
+
for(ui=0; ui<pAsm->number_of_exports; ui++)
{
pAsm->pucOutMask[ui] = 0x0;
@@ -245,7 +234,7 @@ void Map_Vertex_Program(GLcontext *ctx,
{ /* fix func t_vp uses NumTemporaries */
pAsm->number_used_registers += mesa_vp->Base.NumTemporaries;
}
-
+
pAsm->uFirstHelpReg = pAsm->number_used_registers;
}
@@ -300,18 +289,13 @@ GLboolean Find_Instruction_Dependencies_vp(struct r700_vertex_program *vp,
}
struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,
- struct gl_vertex_program *mesa_vp,
- GLint nVer)
+ struct gl_vertex_program *mesa_vp)
{
context_t *context = R700_CONTEXT(ctx);
struct r700_vertex_program *vp;
- TNLcontext *tnl = TNL_CONTEXT(ctx);
- struct vertex_buffer *vb = &tnl->vb;
- unsigned int unBit;
unsigned int i;
vp = _mesa_calloc(sizeof(*vp));
- vp->uiVersion = nVer;
vp->mesa_program = (struct gl_vertex_program *)_mesa_clone_program(ctx, &mesa_vp->Base);
if (mesa_vp->IsPositionInvariant)
@@ -319,29 +303,13 @@ struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,
_mesa_insert_mvp_code(ctx, vp->mesa_program);
}
- if( 1 == nVer )
+ for(i=0; i<context->nNumActiveAos; i++)
{
- for(i=0; i<VERT_ATTRIB_MAX; i++)
- {
- unBit = 1 << i;
- if(vp->mesa_program->Base.InputsRead & unBit) /* ctx->Array.ArrayObj->xxxxxxx */
- {
- vp->aos_desc[i].size = vb->AttribPtr[i]->size;
- vp->aos_desc[i].stride = vb->AttribPtr[i]->size * sizeof(GL_FLOAT);/* when emit array, data is packed. vb->AttribPtr[i]->stride;*/
- vp->aos_desc[i].type = GL_FLOAT;
- }
- }
+ vp->aos_desc[i].size = context->stream_desc[i].size;
+ vp->aos_desc[i].stride = context->stream_desc[i].stride;
+ vp->aos_desc[i].type = context->stream_desc[i].type;
}
- else
- {
- for(i=0; i<context->nNumActiveAos; i++)
- {
- vp->aos_desc[i].size = context->stream_desc[i].size;
- vp->aos_desc[i].stride = context->stream_desc[i].stride;
- vp->aos_desc[i].type = context->stream_desc[i].type;
- }
- }
-
+
if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
{
vp->r700AsmCode.bR6xx = 1;
@@ -354,14 +322,14 @@ struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,
if(GL_FALSE == Find_Instruction_Dependencies_vp(vp, vp->mesa_program))
{
return NULL;
- }
+ }
if(GL_FALSE == AssembleInstr(vp->mesa_program->Base.NumInstructions,
- &(vp->mesa_program->Base.Instructions[0]),
+ &(vp->mesa_program->Base.Instructions[0]),
&(vp->r700AsmCode)) )
{
return NULL;
- }
+ }
if(GL_FALSE == Process_Vertex_Exports(&(vp->r700AsmCode), vp->mesa_program->Base.OutputsWritten) )
{
@@ -378,14 +346,11 @@ struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,
return vp;
}
-void r700SelectVertexShader(GLcontext *ctx, GLint nVersion)
+void r700SelectVertexShader(GLcontext *ctx)
{
context_t *context = R700_CONTEXT(ctx);
struct r700_vertex_program_cont *vpc;
struct r700_vertex_program *vp;
- TNLcontext *tnl = TNL_CONTEXT(ctx);
- struct vertex_buffer *vb = &tnl->vb;
- unsigned int unBit;
unsigned int i;
GLboolean match;
GLbitfield InputsRead;
@@ -396,47 +361,27 @@ void r700SelectVertexShader(GLcontext *ctx, GLint nVersion)
if (vpc->mesa_program.IsPositionInvariant)
{
InputsRead |= VERT_BIT_POS;
- }
-
+ }
+
for (vp = vpc->progs; vp; vp = vp->next)
{
- if (vp->uiVersion != nVersion )
- continue;
- match = GL_TRUE;
- if ( 1 == nVersion )
+ match = GL_TRUE;
+ for(i=0; i<context->nNumActiveAos; i++)
{
- for(i=0; i<VERT_ATTRIB_MAX; i++)
- {
- unBit = 1 << i;
- if(InputsRead & unBit)
+ if (vp->aos_desc[i].size != context->stream_desc[i].size)
{
- if (vp->aos_desc[i].size != vb->AttribPtr[i]->size)
- {
match = GL_FALSE;
break;
- }
}
- }
}
- else
- {
- for(i=0; i<context->nNumActiveAos; i++)
- {
- if (vp->aos_desc[i].size != context->stream_desc[i].size)
- {
- match = GL_FALSE;
- break;
- }
- }
- }
- if (match)
+ if (match)
{
context->selected_vp = vp;
return;
}
}
- vp = r700TranslateVertexShader(ctx, &(vpc->mesa_program), nVersion);
+ vp = r700TranslateVertexShader(ctx, &(vpc->mesa_program));
if(!vp)
{
radeon_error("Failed to translate vertex shader. \n");
diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.h b/src/mesa/drivers/dri/r600/r700_vertprog.h
index f9a3e395ee9..00824c29d32 100644
--- a/src/mesa/drivers/dri/r600/r700_vertprog.h
+++ b/src/mesa/drivers/dri/r600/r700_vertprog.h
@@ -52,8 +52,7 @@ struct r700_vertex_program
GLboolean translated;
GLboolean loaded;
- GLint uiVersion;
-
+
void * shaderbo;
ArrayDesc aos_desc[VERT_ATTRIB_MAX];
@@ -87,11 +86,10 @@ GLboolean Find_Instruction_Dependencies_vp(struct r700_vertex_program *vp,
struct gl_vertex_program *mesa_vp);
struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,
- struct gl_vertex_program *mesa_vp,
- GLint nVer);
+ struct gl_vertex_program *mesa_vp);
/* Interface */
-extern void r700SelectVertexShader(GLcontext *ctx, GLint nVersion);
+extern void r700SelectVertexShader(GLcontext *ctx);
extern void r700SetVertexFormat(GLcontext *ctx, const struct gl_client_array *arrays[], int count);
extern GLboolean r700SetupVertexProgram(GLcontext * ctx);
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-29 08:48:19 +0000