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-rw-r--r--src/mesa/drivers/dri/i965/brw_gs.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.cpp4
-rw-r--r--src/mesa/drivers/dri/i965/brw_tes.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.cpp4
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp4
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs.c4
6 files changed, 12 insertions, 12 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index b83fdb4bae8..a11ef73d9db 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -136,10 +136,6 @@ brw_codegen_gs_prog(struct brw_context *brw,
uint64_t outputs_written = gp->program.info.outputs_written;
- prog_data.base.cull_distance_mask =
- ((1 << gp->program.CullDistanceArraySize) - 1) <<
- gp->program.ClipDistanceArraySize;
-
brw_compute_vue_map(devinfo,
&prog_data.base.vue_map, outputs_written,
prog->SeparateShader);
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 5ab8ada8bf0..8601bb5ea18 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -1376,6 +1376,10 @@ brw_compile_tes(const struct brw_compiler *compiler,
return NULL;
}
+ prog_data->base.cull_distance_mask =
+ ((1 << nir->info->cull_distance_array_size) - 1) <<
+ nir->info->clip_distance_array_size;
+
/* URB entry sizes are stored as a multiple of 64 bytes. */
prog_data->base.urb_entry_size = ALIGN(output_size_bytes, 64) / 64;
diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c
index 414e90f09d2..d047c93ef17 100644
--- a/src/mesa/drivers/dri/i965/brw_tes.c
+++ b/src/mesa/drivers/dri/i965/brw_tes.c
@@ -162,10 +162,6 @@ brw_codegen_tes_prog(struct brw_context *brw,
prog_data.base.base.nr_params = param_count;
prog_data.base.base.nr_image_params = tep->program.info.num_images;
- prog_data.base.cull_distance_mask =
- ((1 << tep->program.CullDistanceArraySize) - 1) <<
- tep->program.ClipDistanceArraySize;
-
brw_nir_setup_glsl_uniforms(nir, shader_prog, &tep->program,
&prog_data.base.base,
compiler->scalar_stage[MESA_SHADER_TESS_EVAL]);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 6d487da11c8..4da8f6e09d6 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -2121,6 +2121,10 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
const unsigned *assembly = NULL;
+ prog_data->base.cull_distance_mask =
+ ((1 << shader->info->cull_distance_array_size) - 1) <<
+ shader->info->clip_distance_array_size;
+
unsigned nr_attributes = _mesa_bitcount_64(prog_data->inputs_read);
/* gl_VertexID and gl_InstanceID are system values, but arrive via an
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
index b2add0378d1..5e2dcc08540 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp
@@ -621,6 +621,10 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
brw_nir_lower_vue_outputs(shader, is_scalar);
shader = brw_postprocess_nir(shader, compiler->devinfo, is_scalar);
+ prog_data->base.cull_distance_mask =
+ ((1 << shader->info->cull_distance_array_size) - 1) <<
+ shader->info->clip_distance_array_size;
+
prog_data->include_primitive_id =
(shader->info->system_values_read & (1 << SYSTEM_VALUE_PRIMITIVE_ID)) != 0;
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index a6ffa835066..dea1cf4ee90 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -156,10 +156,6 @@ brw_codegen_vs_prog(struct brw_context *brw,
prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
}
- prog_data.base.cull_distance_mask =
- ((1 << vp->program.CullDistanceArraySize) - 1) <<
- vp->program.ClipDistanceArraySize;
-
brw_compute_vue_map(devinfo,
&prog_data.base.vue_map, outputs_written,
prog ? prog->SeparateShader ||