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-rw-r--r--src/gallium/drivers/vc4/vc4_program.c5
-rw-r--r--src/gallium/drivers/vc4/vc4_qir.c2
-rw-r--r--src/gallium/drivers/vc4/vc4_qir.h3
-rw-r--r--src/gallium/drivers/vc4/vc4_qpu_emit.c19
4 files changed, 17 insertions, 12 deletions
diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 6ae8103960e..8a83913bbe5 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -831,7 +831,7 @@ emit_fragcoord_input(struct vc4_compile *c, int attr)
c->inputs[attr * 4 + 1] = qir_FRAG_Y(c);
c->inputs[attr * 4 + 2] =
qir_FMUL(c,
- qir_FRAG_Z(c),
+ qir_ITOF(c, qir_FRAG_Z(c)),
qir_uniform_f(c, 1.0 / 0xffffff));
c->inputs[attr * 4 + 3] = qir_FRAG_RCP_W(c);
}
@@ -1238,8 +1238,7 @@ emit_frag_end(struct vc4_compile *c)
qir_TLB_DISCARD_SETUP(c, c->discard);
if (c->fs_key->depth_enabled) {
- qir_emit(c, qir_inst(QOP_TLB_PASSTHROUGH_Z_WRITE, c->undef,
- c->undef, c->undef));
+ qir_TLB_Z_WRITE(c, qir_FRAG_Z(c));
}
bool color_written = false;
diff --git a/src/gallium/drivers/vc4/vc4_qir.c b/src/gallium/drivers/vc4/vc4_qir.c
index 0ab81d4d714..640589d23c0 100644
--- a/src/gallium/drivers/vc4/vc4_qir.c
+++ b/src/gallium/drivers/vc4/vc4_qir.c
@@ -77,7 +77,7 @@ static const struct qir_op_info qir_op_info[] = {
[QOP_VPM_WRITE] = { "vpm_write", 0, 1, true },
[QOP_VPM_READ] = { "vpm_read", 0, 1, true },
[QOP_TLB_DISCARD_SETUP] = { "discard", 0, 1, true },
- [QOP_TLB_PASSTHROUGH_Z_WRITE] = { "tlb_passthrough_z", 0, 0, true },
+ [QOP_TLB_Z_WRITE] = { "tlb_z", 0, 1, true },
[QOP_TLB_COLOR_WRITE] = { "tlb_color", 0, 1, true },
[QOP_TLB_COLOR_READ] = { "tlb_color_read", 1, 0, true },
[QOP_VARY_ADD_C] = { "vary_add_c", 1, 1 },
diff --git a/src/gallium/drivers/vc4/vc4_qir.h b/src/gallium/drivers/vc4/vc4_qir.h
index 539993f41b4..f26f8963f34 100644
--- a/src/gallium/drivers/vc4/vc4_qir.h
+++ b/src/gallium/drivers/vc4/vc4_qir.h
@@ -97,7 +97,7 @@ enum qop {
QOP_VPM_WRITE,
QOP_VPM_READ,
QOP_TLB_DISCARD_SETUP,
- QOP_TLB_PASSTHROUGH_Z_WRITE,
+ QOP_TLB_Z_WRITE,
QOP_TLB_COLOR_WRITE,
QOP_TLB_COLOR_READ,
QOP_VARY_ADD_C,
@@ -361,6 +361,7 @@ QIR_ALU0(FRAG_Z)
QIR_ALU0(FRAG_RCP_W)
QIR_ALU0(TEX_RESULT)
QIR_ALU0(TLB_COLOR_READ)
+QIR_NODST_1(TLB_Z_WRITE)
QIR_NODST_1(TLB_DISCARD_SETUP)
static inline struct qreg
diff --git a/src/gallium/drivers/vc4/vc4_qpu_emit.c b/src/gallium/drivers/vc4/vc4_qpu_emit.c
index 4dd8609d9ca..26520fec22f 100644
--- a/src/gallium/drivers/vc4/vc4_qpu_emit.c
+++ b/src/gallium/drivers/vc4/vc4_qpu_emit.c
@@ -243,8 +243,7 @@ vc4_generate_code(struct vc4_compile *c)
if (qinst->src[i].file == QFILE_TEMP)
reg_uses_remaining[qinst->src[i].index]++;
}
- if (qinst->op == QOP_TLB_PASSTHROUGH_Z_WRITE ||
- qinst->op == QOP_FRAG_Z)
+ if (qinst->op == QOP_FRAG_Z)
reg_in_use[3 + 32 + QPU_R_FRAG_PAYLOAD_ZW] = true;
}
@@ -362,6 +361,12 @@ vc4_generate_code(struct vc4_compile *c)
if (reg.mux != QPU_MUX_R4)
continue;
break;
+ case QOP_FRAG_Z:
+ if (reg.mux != QPU_MUX_B ||
+ reg.addr != QPU_R_FRAG_PAYLOAD_ZW) {
+ continue;
+ }
+ break;
default:
if (reg.mux == QPU_MUX_R4)
continue;
@@ -492,8 +497,9 @@ vc4_generate_code(struct vc4_compile *c)
break;
case QOP_FRAG_Z:
- queue(c, qpu_a_ITOF(dst,
- qpu_rb(QPU_R_FRAG_PAYLOAD_ZW)));
+ /* QOP_FRAG_Z doesn't emit instructions, just
+ * allocates the register to the Z payload.
+ */
break;
case QOP_FRAG_RCP_W:
@@ -509,9 +515,8 @@ vc4_generate_code(struct vc4_compile *c)
*last_inst(c) |= QPU_SF;
break;
- case QOP_TLB_PASSTHROUGH_Z_WRITE:
- queue(c, qpu_a_MOV(qpu_ra(QPU_W_TLB_Z),
- qpu_rb(QPU_R_FRAG_PAYLOAD_ZW)));
+ case QOP_TLB_Z_WRITE:
+ queue(c, qpu_a_MOV(qpu_ra(QPU_W_TLB_Z), src[0]));
if (discard) {
set_last_cond_add(c, QPU_COND_ZS);
}