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-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h8
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_sf_emit.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.h4
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs.c4
5 files changed, 10 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 0c41ad080c6..1ceb40f67b4 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -338,7 +338,7 @@ typedef enum
* more info.
*/
BRW_VARYING_SLOT_PNTC,
- BRW_VARYING_SLOT_MAX
+ BRW_VARYING_SLOT_COUNT
} brw_varying_slot;
@@ -360,18 +360,18 @@ struct brw_vue_map {
* additional processing is applied before storing them in the VUE), the
* value is -1.
*/
- int varying_to_slot[BRW_VARYING_SLOT_MAX];
+ int varying_to_slot[BRW_VARYING_SLOT_COUNT];
/**
* Map from VUE slot to gl_varying_slot value. For slots that do not
* directly correspond to a gl_varying_slot, the value comes from
* brw_varying_slot.
*
- * For slots that are not in use, the value is BRW_VARYING_SLOT_MAX (this
+ * For slots that are not in use, the value is BRW_VARYING_SLOT_COUNT (this
* simplifies code that uses the value stored in slot_to_varying to
* create a bit mask).
*/
- int slot_to_varying[BRW_VARYING_SLOT_MAX];
+ int slot_to_varying[BRW_VARYING_SLOT_COUNT];
/**
* Total number of VUE slots in use
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index 13289844035..7118dc7fff4 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -197,7 +197,7 @@ static void populate_key( struct brw_context *brw,
/* Make sure that the VUE slots won't overflow the unsigned chars in
* key->transform_feedback_bindings[].
*/
- STATIC_ASSERT(BRW_VARYING_SLOT_MAX <= 256);
+ STATIC_ASSERT(BRW_VARYING_SLOT_COUNT <= 256);
/* Make sure that we don't need more binding table entries than we've
* set aside for use in transform feedback. (We shouldn't, since we
diff --git a/src/mesa/drivers/dri/i965/brw_sf_emit.c b/src/mesa/drivers/dri/i965/brw_sf_emit.c
index ed69d6edbd6..579adb68acb 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_emit.c
@@ -358,7 +358,7 @@ calculate_masks(struct brw_sf_compile *c,
/* Maybe only processs one attribute on the final round:
*/
- if (vert_reg_to_varying(c, reg, 1) != BRW_VARYING_SLOT_MAX) {
+ if (vert_reg_to_varying(c, reg, 1) != BRW_VARYING_SLOT_COUNT) {
*pc |= 0xf0;
if (persp_mask & BITFIELD64_BIT(vert_reg_to_varying(c, reg, 1)))
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 3af42d9b392..7d4ade50ccb 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -299,8 +299,8 @@ public:
/* Regs for vertex results. Generated at ir_variable visiting time
* for the ir->location's used.
*/
- dst_reg output_reg[BRW_VARYING_SLOT_MAX];
- const char *output_reg_annotation[BRW_VARYING_SLOT_MAX];
+ dst_reg output_reg[BRW_VARYING_SLOT_COUNT];
+ const char *output_reg_annotation[BRW_VARYING_SLOT_COUNT];
int uniform_size[MAX_UNIFORMS];
int uniform_vector_size[MAX_UNIFORMS];
int uniforms;
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 01502ed68a4..9bcb5e3de47 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -66,9 +66,9 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c)
int i;
vue_map->num_slots = 0;
- for (i = 0; i < BRW_VARYING_SLOT_MAX; ++i) {
+ for (i = 0; i < BRW_VARYING_SLOT_COUNT; ++i) {
vue_map->varying_to_slot[i] = -1;
- vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_MAX;
+ vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_COUNT;
}
/* VUE header: format depends on chip generation and whether clipping is