diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.c | 13 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 7 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 34 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 8 |
4 files changed, 51 insertions, 11 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 37fca5e9d31..ba14136edc6 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -166,7 +166,11 @@ blorp_surf_for_miptree(struct brw_context *brw, /* We only really need a clear color if we also have an auxiliary * surface. Without one, it does nothing. */ - surf->clear_color = mt->fast_clear_color; + surf->clear_color = + intel_miptree_get_clear_color(devinfo, mt, mt->surf.format, + !is_render_target, (struct brw_bo **) + &surf->clear_color_addr.buffer, + &surf->clear_color_addr.offset); surf->aux_surf = &mt->aux_buf->surf; surf->aux_addr = (struct blorp_address) { @@ -176,13 +180,6 @@ blorp_surf_for_miptree(struct brw_context *brw, surf->aux_addr.buffer = mt->aux_buf->bo; surf->aux_addr.offset = mt->aux_buf->offset; - - if (devinfo->gen >= 10) { - surf->clear_color_addr = (struct blorp_address) { - .buffer = mt->aux_buf->clear_color_bo, - .offset = mt->aux_buf->clear_color_offset, - }; - } } else { surf->aux_addr = (struct blorp_address) { .buffer = NULL, diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 7cbd2d42ae5..96c93a7e5bf 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -166,9 +166,10 @@ brw_emit_surface_state(struct brw_context *brw, /* We only really need a clear color if we also have an auxiliary * surface. Without one, it does nothing. */ - clear_bo = mt->aux_buf->clear_color_bo; - clear_offset = mt->aux_buf->clear_color_offset; - clear_color = mt->fast_clear_color; + clear_color = + intel_miptree_get_clear_color(devinfo, mt, view.format, + view.usage & ISL_SURF_USAGE_TEXTURE_BIT, + &clear_bo, &clear_offset); } void *state = brw_state_batch(brw, diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 139f3f0c194..b00368f8f9f 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -46,6 +46,9 @@ #include "main/texcompress_etc.h" #include "main/teximage.h" #include "main/streaming-load-memcpy.h" + +#include "util/format_srgb.h" + #include "x86/common_x86_asm.h" #define FILE_DEBUG_FLAG DEBUG_MIPTREE @@ -3803,3 +3806,34 @@ intel_miptree_set_depth_clear_value(struct brw_context *brw, } return false; } + +union isl_color_value +intel_miptree_get_clear_color(const struct gen_device_info *devinfo, + const struct intel_mipmap_tree *mt, + enum isl_format view_format, bool sampling, + struct brw_bo **clear_color_bo, + uint32_t *clear_color_offset) +{ + assert(mt->aux_buf); + + if (devinfo->gen == 10 && isl_format_is_srgb(view_format) && sampling) { + /* The gen10 sampler doesn't gamma-correct the clear color. In this case, + * we switch to using the inline clear color and do the sRGB color + * conversion process defined in the OpenGL spec. The red, green, and + * blue channels take part in gamma correction, while the alpha channel + * is unchanged. + */ + union isl_color_value srgb_decoded_value = mt->fast_clear_color; + for (unsigned i = 0; i < 3; i++) { + srgb_decoded_value.f32[i] = + util_format_srgb_to_linear_float(mt->fast_clear_color.f32[i]); + } + *clear_color_bo = 0; + *clear_color_offset = 0; + return srgb_decoded_value; + } else { + *clear_color_bo = mt->aux_buf->clear_color_bo; + *clear_color_offset = mt->aux_buf->clear_color_offset; + return mt->fast_clear_color; + } +} diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index 241832f686f..e99ea44b809 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -736,6 +736,14 @@ intel_miptree_set_clear_color(struct brw_context *brw, struct intel_mipmap_tree *mt, const union gl_color_union *color); +/* Get a clear color suitable for filling out an ISL surface state. */ +union isl_color_value +intel_miptree_get_clear_color(const struct gen_device_info *devinfo, + const struct intel_mipmap_tree *mt, + enum isl_format view_format, bool sampling, + struct brw_bo **clear_color_bo, + uint32_t *clear_color_offset); + bool intel_miptree_set_depth_clear_value(struct brw_context *brw, struct intel_mipmap_tree *mt, |