diff options
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.h | 4 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 14 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_viewport.c | 32 |
3 files changed, 24 insertions, 26 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 4fe158fb9af..ed88aa0521b 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -462,8 +462,6 @@ struct si_context { bool need_check_render_feedback; bool decompression_enabled; - bool scissor_enabled; - bool clip_halfz; bool vs_writes_viewport_index; bool vs_disables_clipping_viewport; @@ -567,8 +565,6 @@ struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe, const struct pipe_video_buffer *tmpl); /* si_viewport.c */ -void si_viewport_set_rast_deps(struct si_context *rctx, - bool scissor_enable, bool clip_halfz); void si_update_vs_writes_viewport_index(struct si_context *ctx); void si_init_viewport_functions(struct si_context *ctx); diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 2dbe7c6e274..78a3fbd086e 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -1003,12 +1003,22 @@ static void si_bind_rs_state(struct pipe_context *ctx, void *state) sctx->current_vs_state &= C_VS_STATE_CLAMP_VERTEX_COLOR; sctx->current_vs_state |= S_VS_STATE_CLAMP_VERTEX_COLOR(rs->clamp_vertex_color); - si_viewport_set_rast_deps(sctx, rs->scissor_enable, rs->clip_halfz); - si_pm4_bind_state(sctx, rasterizer, rs); si_update_poly_offset_state(sctx); if (!old_rs || + old_rs->scissor_enable != rs->scissor_enable) { + sctx->scissors.dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; + si_mark_atom_dirty(sctx, &sctx->scissors.atom); + } + + if (!old_rs || + old_rs->clip_halfz != rs->clip_halfz) { + sctx->viewports.depth_range_dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; + si_mark_atom_dirty(sctx, &sctx->viewports.atom); + } + + if (!old_rs || old_rs->clip_plane_enable != rs->clip_plane_enable || old_rs->pa_cl_clip_cntl != rs->pa_cl_clip_cntl) si_mark_atom_dirty(sctx, &sctx->clip_regs); diff --git a/src/gallium/drivers/radeonsi/si_state_viewport.c b/src/gallium/drivers/radeonsi/si_state_viewport.c index 8e08a61f2f6..1201be8779e 100644 --- a/src/gallium/drivers/radeonsi/si_state_viewport.c +++ b/src/gallium/drivers/radeonsi/si_state_viewport.c @@ -40,7 +40,8 @@ static void si_set_scissor_states(struct pipe_context *pctx, for (i = 0; i < num_scissors; i++) ctx->scissors.states[start_slot + i] = state[i]; - if (!ctx->scissor_enabled) + if (!ctx->queued.named.rasterizer || + !ctx->queued.named.rasterizer->scissor_enable) return; ctx->scissors.dirty_mask |= ((1 << num_scissors) - 1) << start_slot; @@ -214,10 +215,13 @@ static void si_emit_scissors(struct r600_common_context *rctx, struct r600_atom struct radeon_winsys_cs *cs = ctx->b.gfx.cs; struct pipe_scissor_state *states = ctx->scissors.states; unsigned mask = ctx->scissors.dirty_mask; - bool scissor_enabled = ctx->scissor_enabled; + bool scissor_enabled = false; struct si_signed_scissor max_vp_scissor; int i; + if (ctx->queued.named.rasterizer) + scissor_enabled = ctx->queued.named.rasterizer->scissor_enable; + /* The simple case: Only 1 viewport is active. */ if (!ctx->vs_writes_viewport_index) { struct si_signed_scissor *vp = &ctx->viewports.as_scissor[0]; @@ -327,14 +331,18 @@ static void si_emit_depth_ranges(struct si_context *ctx) struct radeon_winsys_cs *cs = ctx->b.gfx.cs; struct pipe_viewport_state *states = ctx->viewports.states; unsigned mask = ctx->viewports.depth_range_dirty_mask; + bool clip_halfz = false; float zmin, zmax; + if (ctx->queued.named.rasterizer) + clip_halfz = ctx->queued.named.rasterizer->clip_halfz; + /* The simple case: Only 1 viewport is active. */ if (!ctx->vs_writes_viewport_index) { if (!(mask & 1)) return; - util_viewport_zmin_zmax(&states[0], ctx->clip_halfz, &zmin, &zmax); + util_viewport_zmin_zmax(&states[0], clip_halfz, &zmin, &zmax); radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); radeon_emit(cs, fui(zmin)); @@ -351,7 +359,7 @@ static void si_emit_depth_ranges(struct si_context *ctx) radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + start * 4 * 2, count * 2); for (i = start; i < start+count; i++) { - util_viewport_zmin_zmax(&states[i], ctx->clip_halfz, &zmin, &zmax); + util_viewport_zmin_zmax(&states[i], clip_halfz, &zmin, &zmax); radeon_emit(cs, fui(zmin)); radeon_emit(cs, fui(zmax)); } @@ -367,22 +375,6 @@ static void si_emit_viewport_states(struct r600_common_context *rctx, si_emit_depth_ranges(ctx); } -/* Set viewport dependencies on pipe_rasterizer_state. */ -void si_viewport_set_rast_deps(struct si_context *ctx, - bool scissor_enable, bool clip_halfz) -{ - if (ctx->scissor_enabled != scissor_enable) { - ctx->scissor_enabled = scissor_enable; - ctx->scissors.dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; - si_mark_atom_dirty(ctx, &ctx->scissors.atom); - } - if (ctx->clip_halfz != clip_halfz) { - ctx->clip_halfz = clip_halfz; - ctx->viewports.depth_range_dirty_mask = (1 << SI_MAX_VIEWPORTS) - 1; - si_mark_atom_dirty(ctx, &ctx->viewports.atom); - } -} - /** * Normally, we only emit 1 viewport and 1 scissor if no shader is using * the VIEWPORT_INDEX output, and emitting the other viewports and scissors |