diff options
| -rw-r--r-- | src/amd/common/ac_debug.c | 2 | ||||
| -rw-r--r-- | src/amd/common/sid.h | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_build_pm4.h | 8 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 12 |
4 files changed, 18 insertions, 5 deletions
diff --git a/src/amd/common/ac_debug.c b/src/amd/common/ac_debug.c index 3b15398a2a2..e5463b66616 100644 --- a/src/amd/common/ac_debug.c +++ b/src/amd/common/ac_debug.c @@ -233,6 +233,7 @@ static void ac_parse_packet3(FILE *f, uint32_t header, struct ac_ib_parser *ib, if (op == PKT3_SET_CONTEXT_REG || op == PKT3_SET_CONFIG_REG || op == PKT3_SET_UCONFIG_REG || + op == PKT3_SET_UCONFIG_REG_INDEX || op == PKT3_SET_SH_REG) fprintf(f, COLOR_CYAN "%s%s" COLOR_CYAN ":\n", name, predicate); @@ -252,6 +253,7 @@ static void ac_parse_packet3(FILE *f, uint32_t header, struct ac_ib_parser *ib, ac_parse_set_reg_packet(f, count, SI_CONFIG_REG_OFFSET, ib); break; case PKT3_SET_UCONFIG_REG: + case PKT3_SET_UCONFIG_REG_INDEX: ac_parse_set_reg_packet(f, count, CIK_UCONFIG_REG_OFFSET, ib); break; case PKT3_SET_SH_REG: diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h index 49683f1aa5a..12e80df4884 100644 --- a/src/amd/common/sid.h +++ b/src/amd/common/sid.h @@ -211,6 +211,7 @@ #define PKT3_SET_SH_REG 0x76 #define PKT3_SET_SH_REG_OFFSET 0x77 #define PKT3_SET_UCONFIG_REG 0x79 /* new for CIK */ +#define PKT3_SET_UCONFIG_REG_INDEX 0x7A /* new for GFX9, CP ucode version >= 26 */ #define PKT3_LOAD_CONST_RAM 0x80 #define PKT3_WRITE_CONST_RAM 0x81 #define PKT3_DUMP_CONST_RAM 0x83 diff --git a/src/gallium/drivers/radeonsi/si_build_pm4.h b/src/gallium/drivers/radeonsi/si_build_pm4.h index 796adda0963..4e8890a5f97 100644 --- a/src/gallium/drivers/radeonsi/si_build_pm4.h +++ b/src/gallium/drivers/radeonsi/si_build_pm4.h @@ -100,12 +100,18 @@ static inline void radeon_set_uconfig_reg(struct radeon_cmdbuf *cs, unsigned reg } static inline void radeon_set_uconfig_reg_idx(struct radeon_cmdbuf *cs, + struct si_screen *screen, unsigned reg, unsigned idx, unsigned value) { assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END); assert(cs->current.cdw + 3 <= cs->current.max_dw); - radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, 1, 0)); + assert(idx != 0); + unsigned opcode = PKT3_SET_UCONFIG_REG_INDEX; + if (screen->info.chip_class < GFX9 || + (screen->info.chip_class == GFX9 && screen->info.me_fw_version < 26)) + opcode = PKT3_SET_UCONFIG_REG; + radeon_emit(cs, PKT3(opcode, 1, 0)); radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2 | (idx << 28)); radeon_emit(cs, value); } diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 254f9edeb75..d011adb2cad 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -618,7 +618,9 @@ static void si_emit_draw_registers(struct si_context *sctx, /* Draw state. */ if (ia_multi_vgt_param != sctx->last_multi_vgt_param) { if (sctx->chip_class >= GFX9) - radeon_set_uconfig_reg_idx(cs, R_030960_IA_MULTI_VGT_PARAM, 4, ia_multi_vgt_param); + radeon_set_uconfig_reg_idx(cs, sctx->screen, + R_030960_IA_MULTI_VGT_PARAM, 4, + ia_multi_vgt_param); else if (sctx->chip_class >= CIK) radeon_set_context_reg_idx(cs, R_028AA8_IA_MULTI_VGT_PARAM, 1, ia_multi_vgt_param); else @@ -628,7 +630,8 @@ static void si_emit_draw_registers(struct si_context *sctx, } if (prim != sctx->last_prim) { if (sctx->chip_class >= CIK) - radeon_set_uconfig_reg_idx(cs, R_030908_VGT_PRIMITIVE_TYPE, 1, prim); + radeon_set_uconfig_reg_idx(cs, sctx->screen, + R_030908_VGT_PRIMITIVE_TYPE, 1, prim); else radeon_set_config_reg(cs, R_008958_VGT_PRIMITIVE_TYPE, prim); @@ -716,8 +719,9 @@ static void si_emit_draw_packets(struct si_context *sctx, } if (sctx->chip_class >= GFX9) { - radeon_set_uconfig_reg_idx(cs, R_03090C_VGT_INDEX_TYPE, - 2, index_type); + radeon_set_uconfig_reg_idx(cs, sctx->screen, + R_03090C_VGT_INDEX_TYPE, 2, + index_type); } else { radeon_emit(cs, PKT3(PKT3_INDEX_TYPE, 0, 0)); radeon_emit(cs, index_type); |