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-rw-r--r--src/gallium/drivers/freedreno/freedreno_context.c3
-rw-r--r--src/gallium/drivers/r600/r600_state_common.c4
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c3
-rw-r--r--src/gallium/drivers/softpipe/sp_flush.c3
-rw-r--r--src/gallium/drivers/tegra/tegra_context.c3
-rw-r--r--src/gallium/drivers/v3d/v3d_context.c3
-rw-r--r--src/gallium/include/pipe/p_defines.h7
-rw-r--r--src/mesa/state_tracker/st_cb_texturebarrier.c34
8 files changed, 44 insertions, 16 deletions
diff --git a/src/gallium/drivers/freedreno/freedreno_context.c b/src/gallium/drivers/freedreno/freedreno_context.c
index 6c01c15bb32..4e86d099974 100644
--- a/src/gallium/drivers/freedreno/freedreno_context.c
+++ b/src/gallium/drivers/freedreno/freedreno_context.c
@@ -99,6 +99,9 @@ fd_texture_barrier(struct pipe_context *pctx, unsigned flags)
static void
fd_memory_barrier(struct pipe_context *pctx, unsigned flags)
{
+ if (!(flags & ~PIPE_BARRIER_UPDATE))
+ return;
+
fd_context_flush(pctx, NULL, 0);
/* TODO do we need to check for persistently mapped buffers and fd_bo_cpu_prep()?? */
}
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index f886a27170d..c7c606f131b 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -94,6 +94,10 @@ void r600_emit_alphatest_state(struct r600_context *rctx, struct r600_atom *atom
static void r600_memory_barrier(struct pipe_context *ctx, unsigned flags)
{
struct r600_context *rctx = (struct r600_context *)ctx;
+
+ if (!(flags & ~PIPE_BARRIER_UPDATE))
+ return;
+
if (flags & PIPE_BARRIER_CONSTANT_BUFFER)
rctx->b.flags |= R600_CONTEXT_INV_CONST_CACHE;
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 458b108a7e3..3c29b4c92ed 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -4710,6 +4710,9 @@ void si_memory_barrier(struct pipe_context *ctx, unsigned flags)
{
struct si_context *sctx = (struct si_context *)ctx;
+ if (!(flags & ~PIPE_BARRIER_UPDATE))
+ return;
+
/* Subsequent commands must wait for all shader invocations to
* complete. */
sctx->flags |= SI_CONTEXT_PS_PARTIAL_FLUSH |
diff --git a/src/gallium/drivers/softpipe/sp_flush.c b/src/gallium/drivers/softpipe/sp_flush.c
index 3bf8c499218..5eccbe34d46 100644
--- a/src/gallium/drivers/softpipe/sp_flush.c
+++ b/src/gallium/drivers/softpipe/sp_flush.c
@@ -192,5 +192,8 @@ void softpipe_texture_barrier(struct pipe_context *pipe, unsigned flags)
void softpipe_memory_barrier(struct pipe_context *pipe, unsigned flags)
{
+ if (!(flags & ~PIPE_BARRIER_UPDATE))
+ return;
+
softpipe_texture_barrier(pipe, 0);
}
diff --git a/src/gallium/drivers/tegra/tegra_context.c b/src/gallium/drivers/tegra/tegra_context.c
index bbc03628336..e9e51656921 100644
--- a/src/gallium/drivers/tegra/tegra_context.c
+++ b/src/gallium/drivers/tegra/tegra_context.c
@@ -974,6 +974,9 @@ tegra_memory_barrier(struct pipe_context *pcontext, unsigned int flags)
{
struct tegra_context *context = to_tegra_context(pcontext);
+ if (!(flags & ~PIPE_BARRIER_UPDATE))
+ return;
+
context->gpu->memory_barrier(context->gpu, flags);
}
diff --git a/src/gallium/drivers/v3d/v3d_context.c b/src/gallium/drivers/v3d/v3d_context.c
index d07ad403590..fcd2d5ec69b 100644
--- a/src/gallium/drivers/v3d/v3d_context.c
+++ b/src/gallium/drivers/v3d/v3d_context.c
@@ -71,6 +71,9 @@ v3d_memory_barrier(struct pipe_context *pctx, unsigned int flags)
{
struct v3d_context *v3d = v3d_context(pctx);
+ if (!(flags & ~PIPE_BARRIER_UPDATE))
+ return;
+
/* We only need to flush jobs writing to SSBOs/images. */
perf_debug("Flushing all jobs for glMemoryBarrier(), could do better");
v3d_flush(pctx);
diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h
index d4732dc257f..ebc44d7a75e 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium/include/pipe/p_defines.h
@@ -425,7 +425,12 @@ enum pipe_flush_flags
#define PIPE_BARRIER_FRAMEBUFFER (1 << 9)
#define PIPE_BARRIER_STREAMOUT_BUFFER (1 << 10)
#define PIPE_BARRIER_GLOBAL_BUFFER (1 << 11)
-#define PIPE_BARRIER_ALL ((1 << 12) - 1)
+#define PIPE_BARRIER_UPDATE_BUFFER (1 << 12)
+#define PIPE_BARRIER_UPDATE_TEXTURE (1 << 13)
+#define PIPE_BARRIER_ALL ((1 << 14) - 1)
+
+#define PIPE_BARRIER_UPDATE \
+ (PIPE_BARRIER_UPDATE_BUFFER | PIPE_BARRIER_UPDATE_TEXTURE)
/**
* Flags for pipe_context::texture_barrier.
diff --git a/src/mesa/state_tracker/st_cb_texturebarrier.c b/src/mesa/state_tracker/st_cb_texturebarrier.c
index 2bff03b484a..4a9c72f2c62 100644
--- a/src/mesa/state_tracker/st_cb_texturebarrier.c
+++ b/src/mesa/state_tracker/st_cb_texturebarrier.c
@@ -95,21 +95,25 @@ st_MemoryBarrier(struct gl_context *ctx, GLbitfield barriers)
*/
flags |= PIPE_BARRIER_TEXTURE;
}
- /* GL_TEXTURE_UPDATE_BARRIER_BIT:
- * Texture updates translate to:
- * (1) texture transfers to/from the CPU,
- * (2) texture as blit destination, or
- * (3) texture as framebuffer.
- * In all cases, we assume the driver does the required flushing
- * automatically.
- */
- /* GL_BUFFER_UPDATE_BARRIER_BIT:
- * Buffer updates translate to
- * (1) buffer transfers to/from the CPU,
- * (2) resource copies and clears.
- * In all cases, we assume the driver does the required flushing
- * automatically.
- */
+ if (barriers & GL_TEXTURE_UPDATE_BARRIER_BIT) {
+ /* GL_TEXTURE_UPDATE_BARRIER_BIT:
+ * Texture updates translate to:
+ * (1) texture transfers to/from the CPU,
+ * (2) texture as blit destination, or
+ * (3) texture as framebuffer.
+ * Some drivers may handle these automatically, and can ignore the bit.
+ */
+ flags |= PIPE_BARRIER_UPDATE_TEXTURE;
+ }
+ if (barriers & GL_BUFFER_UPDATE_BARRIER_BIT) {
+ /* GL_BUFFER_UPDATE_BARRIER_BIT:
+ * Buffer updates translate to
+ * (1) buffer transfers to/from the CPU,
+ * (2) resource copies and clears.
+ * Some drivers may handle these automatically, and can ignore the bit.
+ */
+ flags |= PIPE_BARRIER_UPDATE_BUFFER;
+ }
if (barriers & GL_CLIENT_MAPPED_BUFFER_BARRIER_BIT)
flags |= PIPE_BARRIER_MAPPED_BUFFER;
if (barriers & GL_QUERY_BUFFER_BARRIER_BIT)