diff options
| -rw-r--r-- | src/gallium/drivers/radeon/Makefile.sources | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/cayman_msaa.c | 269 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.c | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.h | 25 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/Makefile.sources | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.h | 9 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 79 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.h | 4 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_msaa.c | 209 |
10 files changed, 292 insertions, 307 deletions
diff --git a/src/gallium/drivers/radeon/Makefile.sources b/src/gallium/drivers/radeon/Makefile.sources index c32ebea9574..22de1297381 100644 --- a/src/gallium/drivers/radeon/Makefile.sources +++ b/src/gallium/drivers/radeon/Makefile.sources @@ -1,5 +1,4 @@ C_SOURCES := \ - cayman_msaa.c \ r600_buffer_common.c \ r600_cs.h \ r600_gpu_load.c \ diff --git a/src/gallium/drivers/radeon/cayman_msaa.c b/src/gallium/drivers/radeon/cayman_msaa.c deleted file mode 100644 index 72a393ebd51..00000000000 --- a/src/gallium/drivers/radeon/cayman_msaa.c +++ /dev/null @@ -1,269 +0,0 @@ -/* - * Copyright 2014 Advanced Micro Devices, Inc. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - * Authors: Marek Olšák <[email protected]> - * - */ - -#include "r600_cs.h" - -/* 2xMSAA - * There are two locations (4, 4), (-4, -4). */ -static const uint32_t eg_sample_locs_2x[4] = { - FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4), - FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4), - FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4), - FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4), -}; -static const unsigned eg_max_dist_2x = 4; -/* 4xMSAA - * There are 4 locations: (-2, -6), (6, -2), (-6, 2), (2, 6). */ -static const uint32_t eg_sample_locs_4x[4] = { - FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6), - FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6), - FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6), - FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6), -}; -static const unsigned eg_max_dist_4x = 6; - -/* Cayman 8xMSAA */ -static const uint32_t cm_sample_locs_8x[] = { - FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5), - FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5), - FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5), - FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5), - FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7), - FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7), - FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7), - FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7), -}; -static const unsigned cm_max_dist_8x = 8; -/* Cayman 16xMSAA */ -static const uint32_t cm_sample_locs_16x[] = { - FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1), - FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1), - FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1), - FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1), - FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5), - FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5), - FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5), - FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5), - FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4), - FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4), - FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4), - FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4), - FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8), - FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8), - FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8), - FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8), -}; -static const unsigned cm_max_dist_16x = 8; - -void si_get_sample_position(struct pipe_context *ctx, unsigned sample_count, - unsigned sample_index, float *out_value) -{ - int offset, index; - struct { - int idx:4; - } val; - switch (sample_count) { - case 1: - default: - out_value[0] = out_value[1] = 0.5; - break; - case 2: - offset = 4 * (sample_index * 2); - val.idx = (eg_sample_locs_2x[0] >> offset) & 0xf; - out_value[0] = (float)(val.idx + 8) / 16.0f; - val.idx = (eg_sample_locs_2x[0] >> (offset + 4)) & 0xf; - out_value[1] = (float)(val.idx + 8) / 16.0f; - break; - case 4: - offset = 4 * (sample_index * 2); - val.idx = (eg_sample_locs_4x[0] >> offset) & 0xf; - out_value[0] = (float)(val.idx + 8) / 16.0f; - val.idx = (eg_sample_locs_4x[0] >> (offset + 4)) & 0xf; - out_value[1] = (float)(val.idx + 8) / 16.0f; - break; - case 8: - offset = 4 * (sample_index % 4 * 2); - index = (sample_index / 4) * 4; - val.idx = (cm_sample_locs_8x[index] >> offset) & 0xf; - out_value[0] = (float)(val.idx + 8) / 16.0f; - val.idx = (cm_sample_locs_8x[index] >> (offset + 4)) & 0xf; - out_value[1] = (float)(val.idx + 8) / 16.0f; - break; - case 16: - offset = 4 * (sample_index % 4 * 2); - index = (sample_index / 4) * 4; - val.idx = (cm_sample_locs_16x[index] >> offset) & 0xf; - out_value[0] = (float)(val.idx + 8) / 16.0f; - val.idx = (cm_sample_locs_16x[index] >> (offset + 4)) & 0xf; - out_value[1] = (float)(val.idx + 8) / 16.0f; - break; - } -} - -void si_init_msaa(struct pipe_context *ctx) -{ - struct r600_common_context *rctx = (struct r600_common_context*)ctx; - int i; - - si_get_sample_position(ctx, 1, 0, rctx->sample_locations_1x[0]); - - for (i = 0; i < 2; i++) - si_get_sample_position(ctx, 2, i, rctx->sample_locations_2x[i]); - for (i = 0; i < 4; i++) - si_get_sample_position(ctx, 4, i, rctx->sample_locations_4x[i]); - for (i = 0; i < 8; i++) - si_get_sample_position(ctx, 8, i, rctx->sample_locations_8x[i]); - for (i = 0; i < 16; i++) - si_get_sample_position(ctx, 16, i, rctx->sample_locations_16x[i]); -} - -void si_common_emit_msaa_sample_locs(struct radeon_winsys_cs *cs, int nr_samples) -{ - switch (nr_samples) { - default: - case 1: - radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0); - radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0); - radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0); - radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0); - break; - case 2: - radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_2x[0]); - radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_2x[1]); - radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_2x[2]); - radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_2x[3]); - break; - case 4: - radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, eg_sample_locs_4x[0]); - radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, eg_sample_locs_4x[1]); - radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, eg_sample_locs_4x[2]); - radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, eg_sample_locs_4x[3]); - break; - case 8: - radeon_set_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14); - radeon_emit(cs, cm_sample_locs_8x[0]); - radeon_emit(cs, cm_sample_locs_8x[4]); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - radeon_emit(cs, cm_sample_locs_8x[1]); - radeon_emit(cs, cm_sample_locs_8x[5]); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - radeon_emit(cs, cm_sample_locs_8x[2]); - radeon_emit(cs, cm_sample_locs_8x[6]); - radeon_emit(cs, 0); - radeon_emit(cs, 0); - radeon_emit(cs, cm_sample_locs_8x[3]); - radeon_emit(cs, cm_sample_locs_8x[7]); - break; - case 16: - radeon_set_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16); - radeon_emit(cs, cm_sample_locs_16x[0]); - radeon_emit(cs, cm_sample_locs_16x[4]); - radeon_emit(cs, cm_sample_locs_16x[8]); - radeon_emit(cs, cm_sample_locs_16x[12]); - radeon_emit(cs, cm_sample_locs_16x[1]); - radeon_emit(cs, cm_sample_locs_16x[5]); - radeon_emit(cs, cm_sample_locs_16x[9]); - radeon_emit(cs, cm_sample_locs_16x[13]); - radeon_emit(cs, cm_sample_locs_16x[2]); - radeon_emit(cs, cm_sample_locs_16x[6]); - radeon_emit(cs, cm_sample_locs_16x[10]); - radeon_emit(cs, cm_sample_locs_16x[14]); - radeon_emit(cs, cm_sample_locs_16x[3]); - radeon_emit(cs, cm_sample_locs_16x[7]); - radeon_emit(cs, cm_sample_locs_16x[11]); - radeon_emit(cs, cm_sample_locs_16x[15]); - break; - } -} - -void si_common_emit_msaa_config(struct radeon_winsys_cs *cs, int nr_samples, - int ps_iter_samples, int overrast_samples, - unsigned sc_mode_cntl_1) -{ - int setup_samples = nr_samples > 1 ? nr_samples : - overrast_samples > 1 ? overrast_samples : 0; - /* Required by OpenGL line rasterization. - * - * TODO: We should also enable perpendicular endcaps for AA lines, - * but that requires implementing line stippling in the pixel - * shader. SC can only do line stippling with axis-aligned - * endcaps. - */ - unsigned sc_line_cntl = S_028BDC_DX10_DIAMOND_TEST_ENA(1); - - if (setup_samples > 1) { - /* indexed by log2(nr_samples) */ - unsigned max_dist[] = { - 0, - eg_max_dist_2x, - eg_max_dist_4x, - cm_max_dist_8x, - cm_max_dist_16x - }; - unsigned log_samples = util_logbase2(setup_samples); - unsigned log_ps_iter_samples = - util_logbase2(util_next_power_of_two(ps_iter_samples)); - - radeon_set_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); - radeon_emit(cs, sc_line_cntl | - S_028BDC_EXPAND_LINE_WIDTH(1)); /* CM_R_028BDC_PA_SC_LINE_CNTL */ - radeon_emit(cs, S_028BE0_MSAA_NUM_SAMPLES(log_samples) | - S_028BE0_MAX_SAMPLE_DIST(max_dist[log_samples]) | - S_028BE0_MSAA_EXPOSED_SAMPLES(log_samples)); /* CM_R_028BE0_PA_SC_AA_CONFIG */ - - if (nr_samples > 1) { - radeon_set_context_reg(cs, CM_R_028804_DB_EQAA, - S_028804_MAX_ANCHOR_SAMPLES(log_samples) | - S_028804_PS_ITER_SAMPLES(log_ps_iter_samples) | - S_028804_MASK_EXPORT_NUM_SAMPLES(log_samples) | - S_028804_ALPHA_TO_MASK_NUM_SAMPLES(log_samples) | - S_028804_HIGH_QUALITY_INTERSECTIONS(1) | - S_028804_STATIC_ANCHOR_ASSOCIATIONS(1)); - radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, - EG_S_028A4C_PS_ITER_SAMPLE(ps_iter_samples > 1) | - sc_mode_cntl_1); - } else if (overrast_samples > 1) { - radeon_set_context_reg(cs, CM_R_028804_DB_EQAA, - S_028804_HIGH_QUALITY_INTERSECTIONS(1) | - S_028804_STATIC_ANCHOR_ASSOCIATIONS(1) | - S_028804_OVERRASTERIZATION_AMOUNT(log_samples)); - radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, - sc_mode_cntl_1); - } - } else { - radeon_set_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); - radeon_emit(cs, sc_line_cntl); /* CM_R_028BDC_PA_SC_LINE_CNTL */ - radeon_emit(cs, 0); /* CM_R_028BE0_PA_SC_AA_CONFIG */ - - radeon_set_context_reg(cs, CM_R_028804_DB_EQAA, - S_028804_HIGH_QUALITY_INTERSECTIONS(1) | - S_028804_STATIC_ANCHOR_ASSOCIATIONS(1)); - radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, - sc_mode_cntl_1); - } -} diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index 262476fc1bb..f8a826fc07b 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -638,7 +638,6 @@ bool si_common_context_init(struct r600_common_context *rctx, si_init_context_texture_functions(rctx); si_init_query_functions(rctx); - si_init_msaa(&rctx->b); if (rctx->chip_class == CIK || rctx->chip_class == VI || diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index b620e6bfff5..a7c91cb8a12 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -578,15 +578,6 @@ struct r600_common_context { bool render_cond_invert; bool render_cond_force_off; /* for u_blitter */ - /* MSAA sample locations. - * The first index is the sample index. - * The second index is the coordinate: X, Y. */ - float sample_locations_1x[1][2]; - float sample_locations_2x[2][2]; - float sample_locations_4x[4][2]; - float sample_locations_8x[8][2]; - float sample_locations_16x[16][2]; - /* Statistics gathering for the DCC enablement heuristic. It can't be * in r600_texture because r600_texture can be shared by multiple * contexts. This is for back buffers only. We shouldn't get too many @@ -806,15 +797,6 @@ bool si_texture_disable_dcc(struct r600_common_context *rctx, void si_init_screen_texture_functions(struct r600_common_screen *rscreen); void si_init_context_texture_functions(struct r600_common_context *rctx); -/* cayman_msaa.c */ -void si_get_sample_position(struct pipe_context *ctx, unsigned sample_count, - unsigned sample_index, float *out_value); -void si_init_msaa(struct pipe_context *ctx); -void si_common_emit_msaa_sample_locs(struct radeon_winsys_cs *cs, int nr_samples); -void si_common_emit_msaa_config(struct radeon_winsys_cs *cs, int nr_samples, - int ps_iter_samples, int overrast_samples, - unsigned sc_mode_cntl_1); - /* Inline helpers. */ @@ -923,13 +905,6 @@ vi_tc_compat_htile_enabled(struct r600_texture *tex, unsigned level) #define R600_ERR(fmt, args...) \ fprintf(stderr, "EE %s:%d %s - " fmt, __FILE__, __LINE__, __func__, ##args) -/* For MSAA sample positions. */ -#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \ - (((s0x) & 0xf) | (((unsigned)(s0y) & 0xf) << 4) | \ - (((unsigned)(s1x) & 0xf) << 8) | (((unsigned)(s1y) & 0xf) << 12) | \ - (((unsigned)(s2x) & 0xf) << 16) | (((unsigned)(s2y) & 0xf) << 20) | \ - (((unsigned)(s3x) & 0xf) << 24) | (((unsigned)(s3y) & 0xf) << 28)) - static inline int S_FIXED(float value, unsigned frac_bits) { return value * (1 << frac_bits); diff --git a/src/gallium/drivers/radeonsi/Makefile.sources b/src/gallium/drivers/radeonsi/Makefile.sources index 63cd7a30978..2d746ab4bae 100644 --- a/src/gallium/drivers/radeonsi/Makefile.sources +++ b/src/gallium/drivers/radeonsi/Makefile.sources @@ -29,6 +29,7 @@ C_SOURCES := \ si_state.c \ si_state_binning.c \ si_state_draw.c \ + si_state_msaa.c \ si_state_shaders.c \ si_state_streamout.c \ si_state_viewport.c \ diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index b9840ad8e31..43849877e25 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -205,6 +205,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, si_init_compute_functions(sctx); si_init_cp_dma_functions(sctx); si_init_debug_functions(sctx); + si_init_msaa_functions(sctx); si_init_streamout_functions(sctx); if (sscreen->b.info.has_hw_decode) { diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 4e54b7ef160..c162a0fcd62 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -543,6 +543,15 @@ struct si_context { /* Bindless state */ bool uses_bindless_samplers; bool uses_bindless_images; + + /* MSAA sample locations. + * The first index is the sample index. + * The second index is the coordinate: X, Y. */ + float sample_locations_1x[1][2]; + float sample_locations_2x[2][2]; + float sample_locations_4x[4][2]; + float sample_locations_8x[8][2]; + float sample_locations_16x[16][2]; }; /* cik_sdma.c */ diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 82f3962a6cb..3c6b7ca3f5f 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -2886,19 +2886,19 @@ static void si_set_framebuffer_state(struct pipe_context *ctx, /* Set sample locations as fragment shader constants. */ switch (sctx->framebuffer.nr_samples) { case 1: - constbuf.user_buffer = sctx->b.sample_locations_1x; + constbuf.user_buffer = sctx->sample_locations_1x; break; case 2: - constbuf.user_buffer = sctx->b.sample_locations_2x; + constbuf.user_buffer = sctx->sample_locations_2x; break; case 4: - constbuf.user_buffer = sctx->b.sample_locations_4x; + constbuf.user_buffer = sctx->sample_locations_4x; break; case 8: - constbuf.user_buffer = sctx->b.sample_locations_8x; + constbuf.user_buffer = sctx->sample_locations_8x; break; case 16: - constbuf.user_buffer = sctx->b.sample_locations_16x; + constbuf.user_buffer = sctx->sample_locations_16x; break; default: R600_ERR("Requested an invalid number of samples %i.\n", @@ -3191,7 +3191,7 @@ static void si_emit_msaa_sample_locs(struct si_context *sctx, if (nr_samples != sctx->msaa_sample_locs.nr_samples) { sctx->msaa_sample_locs.nr_samples = nr_samples; - si_common_emit_msaa_sample_locs(cs, nr_samples); + si_emit_sample_locations(cs, nr_samples); } if (sctx->b.family >= CHIP_POLARIS10) { @@ -3303,10 +3303,68 @@ static void si_emit_msaa_config(struct si_context *sctx, struct r600_atom *atom) S_028A4C_FORCE_EOV_CNTDWN_ENABLE(1) | S_028A4C_FORCE_EOV_REZ_ENABLE(1); - si_common_emit_msaa_config(cs, sctx->framebuffer.nr_samples, - sctx->ps_iter_samples, - sctx->smoothing_enabled ? SI_NUM_SMOOTH_AA_SAMPLES : 0, - sc_mode_cntl_1); + int setup_samples = sctx->framebuffer.nr_samples > 1 ? sctx->framebuffer.nr_samples : + sctx->smoothing_enabled ? SI_NUM_SMOOTH_AA_SAMPLES : 0; + + /* Required by OpenGL line rasterization. + * + * TODO: We should also enable perpendicular endcaps for AA lines, + * but that requires implementing line stippling in the pixel + * shader. SC can only do line stippling with axis-aligned + * endcaps. + */ + unsigned sc_line_cntl = S_028BDC_DX10_DIAMOND_TEST_ENA(1); + + if (setup_samples > 1) { + /* distance from the pixel center, indexed by log2(nr_samples) */ + static unsigned max_dist[] = { + 0, /* unused */ + 4, /* 2x MSAA */ + 6, /* 4x MSAA */ + 7, /* 8x MSAA */ + 8, /* 16x MSAA */ + }; + unsigned log_samples = util_logbase2(setup_samples); + unsigned log_ps_iter_samples = + util_logbase2(util_next_power_of_two(sctx->ps_iter_samples)); + + radeon_set_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); + radeon_emit(cs, sc_line_cntl | + S_028BDC_EXPAND_LINE_WIDTH(1)); /* CM_R_028BDC_PA_SC_LINE_CNTL */ + radeon_emit(cs, S_028BE0_MSAA_NUM_SAMPLES(log_samples) | + S_028BE0_MAX_SAMPLE_DIST(max_dist[log_samples]) | + S_028BE0_MSAA_EXPOSED_SAMPLES(log_samples)); /* CM_R_028BE0_PA_SC_AA_CONFIG */ + + if (sctx->framebuffer.nr_samples > 1) { + radeon_set_context_reg(cs, CM_R_028804_DB_EQAA, + S_028804_MAX_ANCHOR_SAMPLES(log_samples) | + S_028804_PS_ITER_SAMPLES(log_ps_iter_samples) | + S_028804_MASK_EXPORT_NUM_SAMPLES(log_samples) | + S_028804_ALPHA_TO_MASK_NUM_SAMPLES(log_samples) | + S_028804_HIGH_QUALITY_INTERSECTIONS(1) | + S_028804_STATIC_ANCHOR_ASSOCIATIONS(1)); + radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, + EG_S_028A4C_PS_ITER_SAMPLE(sctx->ps_iter_samples > 1) | + sc_mode_cntl_1); + } else if (sctx->smoothing_enabled) { + radeon_set_context_reg(cs, CM_R_028804_DB_EQAA, + S_028804_HIGH_QUALITY_INTERSECTIONS(1) | + S_028804_STATIC_ANCHOR_ASSOCIATIONS(1) | + S_028804_OVERRASTERIZATION_AMOUNT(log_samples)); + radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, + sc_mode_cntl_1); + } + } else { + radeon_set_context_reg_seq(cs, CM_R_028BDC_PA_SC_LINE_CNTL, 2); + radeon_emit(cs, sc_line_cntl); /* CM_R_028BDC_PA_SC_LINE_CNTL */ + radeon_emit(cs, 0); /* CM_R_028BE0_PA_SC_AA_CONFIG */ + + radeon_set_context_reg(cs, CM_R_028804_DB_EQAA, + S_028804_HIGH_QUALITY_INTERSECTIONS(1) | + S_028804_STATIC_ANCHOR_ASSOCIATIONS(1)); + radeon_set_context_reg(cs, EG_R_028A4C_PA_SC_MODE_CNTL_1, + sc_mode_cntl_1); + } /* GFX9: Flush DFSM when the AA mode changes. */ if (sctx->screen->dfsm_allowed) { @@ -4447,7 +4505,6 @@ void si_init_state_functions(struct si_context *sctx) sctx->b.b.set_stencil_ref = si_set_stencil_ref; sctx->b.b.set_framebuffer_state = si_set_framebuffer_state; - sctx->b.b.get_sample_position = si_get_sample_position; sctx->b.b.create_sampler_state = si_create_sampler_state; sctx->b.b.delete_sampler_state = si_delete_sampler_state; diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index a686d0d08fb..8122ddb392e 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -423,6 +423,10 @@ void si_draw_rectangle(struct blitter_context *blitter, const union blitter_attrib *attrib); void si_trace_emit(struct si_context *sctx); +/* si_state_msaa.c */ +void si_init_msaa_functions(struct si_context *sctx); +void si_emit_sample_locations(struct radeon_winsys_cs *cs, int nr_samples); + /* si_state_streamout.c */ void si_streamout_buffers_dirty(struct si_context *sctx); void si_emit_streamout_end(struct si_context *sctx); diff --git a/src/gallium/drivers/radeonsi/si_state_msaa.c b/src/gallium/drivers/radeonsi/si_state_msaa.c new file mode 100644 index 00000000000..977f54b9078 --- /dev/null +++ b/src/gallium/drivers/radeonsi/si_state_msaa.c @@ -0,0 +1,209 @@ +/* + * Copyright 2014 Advanced Micro Devices, Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + * Authors: Marek Olšák <[email protected]> + * + */ + +#include "si_pipe.h" +#include "sid.h" +#include "radeon/r600_cs.h" + +/* For MSAA sample positions. */ +#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \ + (((s0x) & 0xf) | (((unsigned)(s0y) & 0xf) << 4) | \ + (((unsigned)(s1x) & 0xf) << 8) | (((unsigned)(s1y) & 0xf) << 12) | \ + (((unsigned)(s2x) & 0xf) << 16) | (((unsigned)(s2y) & 0xf) << 20) | \ + (((unsigned)(s3x) & 0xf) << 24) | (((unsigned)(s3y) & 0xf) << 28)) + +/* 2xMSAA + * There are two locations (4, 4), (-4, -4). */ +static const uint32_t sample_locs_2x[4] = { + FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4), + FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4), + FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4), + FILL_SREG(4, 4, -4, -4, 4, 4, -4, -4), +}; +/* 4xMSAA + * There are 4 locations: (-2, -6), (6, -2), (-6, 2), (2, 6). */ +static const uint32_t sample_locs_4x[4] = { + FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6), + FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6), + FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6), + FILL_SREG(-2, -6, 6, -2, -6, 2, 2, 6), +}; + +/* Cayman 8xMSAA */ +static const uint32_t sample_locs_8x[] = { + FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5), + FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5), + FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5), + FILL_SREG( 1, -3, -1, 3, 5, 1, -3, -5), + FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7), + FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7), + FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7), + FILL_SREG(-5, 5, -7, -1, 3, 7, 7, -7), +}; +/* Cayman 16xMSAA */ +static const uint32_t sample_locs_16x[] = { + FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1), + FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1), + FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1), + FILL_SREG( 1, 1, -1, -3, -3, 2, 4, -1), + FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5), + FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5), + FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5), + FILL_SREG(-5, -2, 2, 5, 5, 3, 3, -5), + FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4), + FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4), + FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4), + FILL_SREG(-2, 6, 0, -7, -4, -6, -6, 4), + FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8), + FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8), + FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8), + FILL_SREG(-8, 0, 7, -4, 6, 7, -7, -8), +}; + +static void si_get_sample_position(struct pipe_context *ctx, unsigned sample_count, + unsigned sample_index, float *out_value) +{ + int offset, index; + struct { + int idx:4; + } val; + + switch (sample_count) { + case 1: + default: + out_value[0] = out_value[1] = 0.5; + break; + case 2: + offset = 4 * (sample_index * 2); + val.idx = (sample_locs_2x[0] >> offset) & 0xf; + out_value[0] = (float)(val.idx + 8) / 16.0f; + val.idx = (sample_locs_2x[0] >> (offset + 4)) & 0xf; + out_value[1] = (float)(val.idx + 8) / 16.0f; + break; + case 4: + offset = 4 * (sample_index * 2); + val.idx = (sample_locs_4x[0] >> offset) & 0xf; + out_value[0] = (float)(val.idx + 8) / 16.0f; + val.idx = (sample_locs_4x[0] >> (offset + 4)) & 0xf; + out_value[1] = (float)(val.idx + 8) / 16.0f; + break; + case 8: + offset = 4 * (sample_index % 4 * 2); + index = (sample_index / 4) * 4; + val.idx = (sample_locs_8x[index] >> offset) & 0xf; + out_value[0] = (float)(val.idx + 8) / 16.0f; + val.idx = (sample_locs_8x[index] >> (offset + 4)) & 0xf; + out_value[1] = (float)(val.idx + 8) / 16.0f; + break; + case 16: + offset = 4 * (sample_index % 4 * 2); + index = (sample_index / 4) * 4; + val.idx = (sample_locs_16x[index] >> offset) & 0xf; + out_value[0] = (float)(val.idx + 8) / 16.0f; + val.idx = (sample_locs_16x[index] >> (offset + 4)) & 0xf; + out_value[1] = (float)(val.idx + 8) / 16.0f; + break; + } +} + +void si_emit_sample_locations(struct radeon_winsys_cs *cs, int nr_samples) +{ + switch (nr_samples) { + default: + case 1: + radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 0); + radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, 0); + radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, 0); + radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, 0); + break; + case 2: + radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_2x[0]); + radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_2x[1]); + radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_2x[2]); + radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_2x[3]); + break; + case 4: + radeon_set_context_reg(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, sample_locs_4x[0]); + radeon_set_context_reg(cs, CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0, sample_locs_4x[1]); + radeon_set_context_reg(cs, CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0, sample_locs_4x[2]); + radeon_set_context_reg(cs, CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0, sample_locs_4x[3]); + break; + case 8: + radeon_set_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 14); + radeon_emit(cs, sample_locs_8x[0]); + radeon_emit(cs, sample_locs_8x[4]); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + radeon_emit(cs, sample_locs_8x[1]); + radeon_emit(cs, sample_locs_8x[5]); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + radeon_emit(cs, sample_locs_8x[2]); + radeon_emit(cs, sample_locs_8x[6]); + radeon_emit(cs, 0); + radeon_emit(cs, 0); + radeon_emit(cs, sample_locs_8x[3]); + radeon_emit(cs, sample_locs_8x[7]); + break; + case 16: + radeon_set_context_reg_seq(cs, CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0, 16); + radeon_emit(cs, sample_locs_16x[0]); + radeon_emit(cs, sample_locs_16x[4]); + radeon_emit(cs, sample_locs_16x[8]); + radeon_emit(cs, sample_locs_16x[12]); + radeon_emit(cs, sample_locs_16x[1]); + radeon_emit(cs, sample_locs_16x[5]); + radeon_emit(cs, sample_locs_16x[9]); + radeon_emit(cs, sample_locs_16x[13]); + radeon_emit(cs, sample_locs_16x[2]); + radeon_emit(cs, sample_locs_16x[6]); + radeon_emit(cs, sample_locs_16x[10]); + radeon_emit(cs, sample_locs_16x[14]); + radeon_emit(cs, sample_locs_16x[3]); + radeon_emit(cs, sample_locs_16x[7]); + radeon_emit(cs, sample_locs_16x[11]); + radeon_emit(cs, sample_locs_16x[15]); + break; + } +} + +void si_init_msaa_functions(struct si_context *sctx) +{ + int i; + + sctx->b.b.get_sample_position = si_get_sample_position; + + si_get_sample_position(&sctx->b.b, 1, 0, sctx->sample_locations_1x[0]); + + for (i = 0; i < 2; i++) + si_get_sample_position(&sctx->b.b, 2, i, sctx->sample_locations_2x[i]); + for (i = 0; i < 4; i++) + si_get_sample_position(&sctx->b.b, 4, i, sctx->sample_locations_4x[i]); + for (i = 0; i < 8; i++) + si_get_sample_position(&sctx->b.b, 8, i, sctx->sample_locations_8x[i]); + for (i = 0; i < 16; i++) + si_get_sample_position(&sctx->b.b, 16, i, sctx->sample_locations_16x[i]); +} |