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-rw-r--r--src/mesa/drivers/dri/i965/gen6_cc.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c
index fcd1794b8f5..d32f6366b7c 100644
--- a/src/mesa/drivers/dri/i965/gen6_cc.c
+++ b/src/mesa/drivers/dri/i965/gen6_cc.c
@@ -32,6 +32,7 @@
#include "intel_batchbuffer.h"
#include "main/macros.h"
#include "main/enums.h"
+#include "main/glformats.h"
static void
gen6_upload_blend_state(struct brw_context *brw)
@@ -125,7 +126,7 @@ gen6_upload_blend_state(struct brw_context *brw)
* not read the alpha channel, but will instead use the correct
* implicit value for alpha.
*/
- if (_mesa_get_format_bits(rb->Format, GL_ALPHA_BITS) == 0)
+ if (!_mesa_base_format_has_channel(rb->_BaseFormat, GL_TEXTURE_ALPHA_TYPE))
{
srcRGB = brw_fix_xRGB_alpha(srcRGB);
srcA = brw_fix_xRGB_alpha(srcA);