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-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp9
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.h4
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_emit.cpp2
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_fp.cpp4
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_visitor.cpp8
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.h3
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_iz.cpp2
8 files changed, 19 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index a370bcd2c13..638fbed33dc 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -2147,6 +2147,7 @@ fs_visitor::run()
bool
brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c,
+ struct gl_fragment_program *fp,
struct gl_shader_program *prog)
{
struct intel_context *intel = &brw->intel;
@@ -2170,14 +2171,14 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c,
printf("\n\n");
} else {
printf("ARB_fragment_program %d ir for native fragment shader\n",
- c->fp->program.Base.Id);
- _mesa_print_program(&c->fp->program.Base);
+ fp->Base.Id);
+ _mesa_print_program(&fp->Base);
}
}
/* Now the main event: Visit the shader IR and generate our FS IR for it.
*/
- fs_visitor v(c, prog, 8);
+ fs_visitor v(c, prog, fp, 8);
if (!v.run()) {
prog->LinkStatus = false;
ralloc_strcat(&prog->InfoLog, v.fail_msg);
@@ -2189,7 +2190,7 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c,
}
if (intel->gen >= 5 && c->prog_data.nr_pull_params == 0) {
- fs_visitor v2(c, prog, 16);
+ fs_visitor v2(c, prog, fp, 16);
v2.import_uniforms(&v);
if (!v2.run()) {
perf_debug("16-wide shader failed to compile, falling back to "
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 30f2d63be85..85078254748 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -184,7 +184,9 @@ class fs_visitor : public backend_visitor
{
public:
- fs_visitor(struct brw_wm_compile *c, struct gl_shader_program *prog,
+ fs_visitor(struct brw_wm_compile *c,
+ struct gl_shader_program *prog,
+ struct gl_fragment_program *fp,
unsigned dispatch_width);
~fs_visitor();
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
index 7fdf5267163..4a1700b8fdb 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
@@ -734,7 +734,7 @@ fs_visitor::generate_code()
prog->Name, dispatch_width);
} else {
printf("Native code for fragment program %d (%d-wide dispatch):\n",
- c->fp->program.Base.Id, dispatch_width);
+ fp->Base.Id, dispatch_width);
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
index 542d80a6b40..bb8cd9a79a8 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_fp.cpp
@@ -591,7 +591,7 @@ fs_visitor::setup_fp_regs()
/* PROGRAM_STATE_VAR etc. */
if (dispatch_width == 8) {
for (unsigned p = 0;
- p < c->fp->program.Base.Parameters->NumParameters; p++) {
+ p < fp->Base.Parameters->NumParameters; p++) {
for (unsigned int i = 0; i < 4; i++) {
this->param_index[c->prog_data.nr_params] = p;
this->param_offset[c->prog_data.nr_params] = i;
@@ -688,7 +688,7 @@ fs_visitor::get_fp_dst_reg(const prog_dst_register *dst)
fs_reg
fs_visitor::get_fp_src_reg(const prog_src_register *src)
{
- struct gl_program_parameter_list *plist = c->fp->program.Base.Parameters;
+ struct gl_program_parameter_list *plist = fp->Base.Parameters;
fs_reg result;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 43266cacfff..6408bc8b445 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -1140,7 +1140,7 @@ fs_visitor::rescale_texcoord(ir_texture *ir, fs_reg coordinate,
(intel->gen < 6 ||
(intel->gen >= 6 && (c->key.tex.gl_clamp_mask[0] & (1 << sampler) ||
c->key.tex.gl_clamp_mask[1] & (1 << sampler))))) {
- struct gl_program_parameter_list *params = c->fp->program.Base.Parameters;
+ struct gl_program_parameter_list *params = fp->Base.Parameters;
int tokens[STATE_LENGTH] = {
STATE_INTERNAL,
STATE_TEXRECT_SCALE,
@@ -2174,14 +2174,16 @@ fs_visitor::resolve_bool_comparison(ir_rvalue *rvalue, fs_reg *reg)
*reg = temp;
}
-fs_visitor::fs_visitor(struct brw_wm_compile *c, struct gl_shader_program *prog,
+fs_visitor::fs_visitor(struct brw_wm_compile *c,
+ struct gl_shader_program *prog,
+ struct gl_fragment_program *fp,
unsigned dispatch_width)
: dispatch_width(dispatch_width)
{
this->c = c;
this->p = &c->func;
this->brw = p->brw;
- this->fp = &c->fp->program;
+ this->fp = fp;
this->prog = prog;
this->intel = &brw->intel;
this->ctx = &intel->ctx;
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 00bd3fe0eb5..f22960330cf 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -168,15 +168,13 @@ bool do_wm_prog(struct brw_context *brw,
memcpy(&c->key, key, sizeof(*key));
- c->fp = fp;
-
brw_init_compile(brw, &c->func, c);
c->prog_data.barycentric_interp_modes =
brw_compute_barycentric_interp_modes(brw, c->key.flat_shade,
&fp->program);
- brw_wm_fs_emit(brw, c, prog);
+ brw_wm_fs_emit(brw, c, &fp->program, prog);
/* Scratch space is used for register spilling */
if (c->last_scratch) {
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index a5ebdddc732..adc05a497f2 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -81,8 +81,6 @@ struct brw_wm_compile {
struct brw_wm_prog_key key;
struct brw_wm_prog_data prog_data;
- struct brw_fragment_program *fp;
-
uint8_t source_depth_reg;
uint8_t source_w_reg;
uint8_t aa_dest_stencil_reg;
@@ -96,6 +94,7 @@ struct brw_wm_compile {
};
bool brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c,
+ struct gl_fragment_program *fp,
struct gl_shader_program *prog);
GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog);
diff --git a/src/mesa/drivers/dri/i965/brw_wm_iz.cpp b/src/mesa/drivers/dri/i965/brw_wm_iz.cpp
index 43cd74c360e..2fd1655267b 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_iz.cpp
+++ b/src/mesa/drivers/dri/i965/brw_wm_iz.cpp
@@ -126,7 +126,7 @@ void fs_visitor::setup_payload_gen4()
bool kill_stats_promoted_workaround = false;
int lookup = c->key.iz_lookup;
bool uses_depth =
- (c->fp->program.Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0;
+ (fp->Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0;
assert(lookup < IZ_BIT_MAX);
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 14:13:05 +0000