diff options
| -rw-r--r-- | src/amd/llvm/ac_llvm_build.c | 25 | ||||
| -rw-r--r-- | src/amd/llvm/ac_llvm_build.h | 4 | ||||
| -rw-r--r-- | src/amd/llvm/ac_nir_to_llvm.c | 10 |
3 files changed, 33 insertions, 6 deletions
diff --git a/src/amd/llvm/ac_llvm_build.c b/src/amd/llvm/ac_llvm_build.c index cda2daab6f5..87adf2b4432 100644 --- a/src/amd/llvm/ac_llvm_build.c +++ b/src/amd/llvm/ac_llvm_build.c @@ -4369,6 +4369,31 @@ ac_build_frexp_mant(struct ac_llvm_context *ctx, LLVMValueRef src0, AC_FUNC_ATTR_READNONE); } +LLVMValueRef +ac_build_canonicalize(struct ac_llvm_context *ctx, LLVMValueRef src0, + unsigned bitsize) +{ + LLVMTypeRef type; + char *intr; + + if (bitsize == 16) { + intr = "llvm.canonicalize.f16"; + type = ctx->f16; + } else if (bitsize == 32) { + intr = "llvm.canonicalize.f32"; + type = ctx->f32; + } else if (bitsize == 64) { + intr = "llvm.canonicalize.f64"; + type = ctx->f64; + } + + LLVMValueRef params[] = { + src0, + }; + return ac_build_intrinsic(ctx, intr, type, params, 1, + AC_FUNC_ATTR_READNONE); +} + /* * this takes an I,J coordinate pair, * and works out the X and Y derivatives. diff --git a/src/amd/llvm/ac_llvm_build.h b/src/amd/llvm/ac_llvm_build.h index 013bf00041a..a67e1d49d4d 100644 --- a/src/amd/llvm/ac_llvm_build.h +++ b/src/amd/llvm/ac_llvm_build.h @@ -716,6 +716,10 @@ ac_build_frexp_mant(struct ac_llvm_context *ctx, LLVMValueRef src0, unsigned bitsize); LLVMValueRef +ac_build_canonicalize(struct ac_llvm_context *ctx, LLVMValueRef src0, + unsigned bitsize); + +LLVMValueRef ac_build_ddxy_interp(struct ac_llvm_context *ctx, LLVMValueRef interp_ij); LLVMValueRef diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index b08483e5cf4..ab042d36083 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -740,9 +740,8 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr) if (ctx->ac.chip_class < GFX9 && instr->dest.dest.ssa.bit_size == 32) { /* Only pre-GFX9 chips do not flush denorms. */ - result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize", - ac_to_float_type(&ctx->ac, def_type), - result); + result = ac_build_canonicalize(&ctx->ac, result, + instr->dest.dest.ssa.bit_size); } break; case nir_op_fmin: @@ -751,9 +750,8 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr) if (ctx->ac.chip_class < GFX9 && instr->dest.dest.ssa.bit_size == 32) { /* Only pre-GFX9 chips do not flush denorms. */ - result = emit_intrin_1f_param(&ctx->ac, "llvm.canonicalize", - ac_to_float_type(&ctx->ac, def_type), - result); + result = ac_build_canonicalize(&ctx->ac, result, + instr->dest.dest.ssa.bit_size); } break; case nir_op_ffma: |