diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_surface_formats.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index 7bc8b8bd377..b5c1a3531c2 100644 --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c @@ -736,6 +736,34 @@ brw_init_surface_formats(struct brw_context *brw) if (brw->gen >= 8) ctx->TextureFormatSupported[MESA_FORMAT_Z_UNORM16] = true; + /* The RGBX formats are not renderable. Normally these get mapped + * internally to RGBA formats when rendering. However on Gen9+ when this + * internal override is used fast clears don't work so they are disabled in + * brw_meta_fast_clear. To avoid this problem we can just pretend not to + * support RGBX formats at all. This will cause the upper layers of Mesa to + * pick the RGBA formats instead. This works fine because when it is used + * as a texture source the swizzle state is programmed to force the alpha + * channel to 1.0 anyway. We could also do this for all gens except that + * it's a bit more difficult when the hardware doesn't support texture + * swizzling. Gens using the blorp have further problems because that + * doesn't implement this swizzle override. We don't need to do this for + * BGRX because that actually is supported natively on Gen8+. + */ + if (brw->gen >= 9) { + static const mesa_format rgbx_formats[] = { + MESA_FORMAT_R8G8B8X8_UNORM, + MESA_FORMAT_R8G8B8X8_SRGB, + MESA_FORMAT_RGBX_UNORM16, + MESA_FORMAT_RGBX_FLOAT16, + MESA_FORMAT_RGBX_FLOAT32 + }; + + for (int i = 0; i < ARRAY_SIZE(rgbx_formats); i++) { + ctx->TextureFormatSupported[rgbx_formats[i]] = false; + brw->format_supported_as_render_target[rgbx_formats[i]] = false; + } + } + /* On hardware that lacks support for ETC1, we map ETC1 to RGBX * during glCompressedTexImage2D(). See intel_mipmap_tree::wraps_etc1. */ |