diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_fbo.c | 8 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_fbo.h | 6 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_screen.c | 14 |
3 files changed, 17 insertions, 11 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index 47c2f45d3f5..f84cea13225 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b/src/mesa/drivers/dri/i965/intel_fbo.c @@ -438,7 +438,8 @@ intel_nop_alloc_storage(struct gl_context * ctx, struct gl_renderbuffer *rb, * \param num_samples must be quantized. */ struct intel_renderbuffer * -intel_create_winsys_renderbuffer(mesa_format format, unsigned num_samples) +intel_create_winsys_renderbuffer(struct intel_screen *screen, + mesa_format format, unsigned num_samples) { struct intel_renderbuffer *irb = CALLOC_STRUCT(intel_renderbuffer); if (!irb) @@ -470,11 +471,12 @@ intel_create_winsys_renderbuffer(mesa_format format, unsigned num_samples) * \param num_samples must be quantized. */ struct intel_renderbuffer * -intel_create_private_renderbuffer(mesa_format format, unsigned num_samples) +intel_create_private_renderbuffer(struct intel_screen *screen, + mesa_format format, unsigned num_samples) { struct intel_renderbuffer *irb; - irb = intel_create_winsys_renderbuffer(format, num_samples); + irb = intel_create_winsys_renderbuffer(screen, format, num_samples); irb->Base.Base.AllocStorage = intel_alloc_private_renderbuffer_storage; return irb; diff --git a/src/mesa/drivers/dri/i965/intel_fbo.h b/src/mesa/drivers/dri/i965/intel_fbo.h index 56c8e6b3b20..7093ad66131 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.h +++ b/src/mesa/drivers/dri/i965/intel_fbo.h @@ -185,10 +185,12 @@ intel_rb_format(const struct intel_renderbuffer *rb) } extern struct intel_renderbuffer * -intel_create_winsys_renderbuffer(mesa_format format, unsigned num_samples); +intel_create_winsys_renderbuffer(struct intel_screen *screen, + mesa_format format, unsigned num_samples); struct intel_renderbuffer * -intel_create_private_renderbuffer(mesa_format format, unsigned num_samples); +intel_create_private_renderbuffer(struct intel_screen *screen, + mesa_format format, unsigned num_samples); struct gl_renderbuffer* intel_create_wrapped_renderbuffer(struct gl_context * ctx, diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index e360d8d7c27..8621af26378 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -1367,11 +1367,11 @@ intelCreateBuffer(__DRIscreen *dri_screen, } /* setup the hardware-based renderbuffers */ - rb = intel_create_winsys_renderbuffer(rgbFormat, num_samples); + rb = intel_create_winsys_renderbuffer(screen, rgbFormat, num_samples); _mesa_attach_and_own_rb(fb, BUFFER_FRONT_LEFT, &rb->Base.Base); if (mesaVis->doubleBufferMode) { - rb = intel_create_winsys_renderbuffer(rgbFormat, num_samples); + rb = intel_create_winsys_renderbuffer(screen, rgbFormat, num_samples); _mesa_attach_and_own_rb(fb, BUFFER_BACK_LEFT, &rb->Base.Base); } @@ -1384,10 +1384,11 @@ intelCreateBuffer(__DRIscreen *dri_screen, assert(mesaVis->stencilBits == 8); if (screen->devinfo.has_hiz_and_separate_stencil) { - rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, + rb = intel_create_private_renderbuffer(screen, + MESA_FORMAT_Z24_UNORM_X8_UINT, num_samples); _mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base); - rb = intel_create_private_renderbuffer(MESA_FORMAT_S_UINT8, + rb = intel_create_private_renderbuffer(screen, MESA_FORMAT_S_UINT8, num_samples); _mesa_attach_and_own_rb(fb, BUFFER_STENCIL, &rb->Base.Base); } else { @@ -1395,7 +1396,8 @@ intelCreateBuffer(__DRIscreen *dri_screen, * Use combined depth/stencil. Note that the renderbuffer is * attached to two attachment points. */ - rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, + rb = intel_create_private_renderbuffer(screen, + MESA_FORMAT_Z24_UNORM_S8_UINT, num_samples); _mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base); _mesa_attach_and_reference_rb(fb, BUFFER_STENCIL, &rb->Base.Base); @@ -1403,7 +1405,7 @@ intelCreateBuffer(__DRIscreen *dri_screen, } else if (mesaVis->depthBits == 16) { assert(mesaVis->stencilBits == 0); - rb = intel_create_private_renderbuffer(MESA_FORMAT_Z_UNORM16, + rb = intel_create_private_renderbuffer(screen, MESA_FORMAT_Z_UNORM16, num_samples); _mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base); } |