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-rw-r--r--src/intel/compiler/brw_fs.h1
-rw-r--r--src/intel/compiler/brw_fs_nir.cpp2
-rw-r--r--src/intel/compiler/brw_fs_visitor.cpp58
3 files changed, 61 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index 6eef13bb317..0701c274adc 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -187,6 +187,7 @@ public:
void emit_discard_jump();
void emit_fsign(const class brw::fs_builder &, const nir_alu_instr *instr,
fs_reg result, fs_reg *op, unsigned fsign_src);
+ void emit_shader_float_controls_execution_mode();
bool opt_peephole_sel();
bool opt_peephole_csel();
bool opt_peephole_predicated_break();
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index 5ed35ff78c0..42b85da32c8 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -34,6 +34,8 @@ using namespace brw;
void
fs_visitor::emit_nir_code()
{
+ emit_shader_float_controls_execution_mode();
+
/* emit the arrays used for inputs and outputs - load/store intrinsics will
* be converted to reads/writes of these arrays
*/
diff --git a/src/intel/compiler/brw_fs_visitor.cpp b/src/intel/compiler/brw_fs_visitor.cpp
index 49eb9c00f1b..d723e2818e8 100644
--- a/src/intel/compiler/brw_fs_visitor.cpp
+++ b/src/intel/compiler/brw_fs_visitor.cpp
@@ -200,6 +200,64 @@ fs_visitor::emit_interpolation_setup_gen4()
abld.emit(SHADER_OPCODE_RCP, this->pixel_w, wpos_w);
}
+static unsigned
+brw_rnd_mode_from_nir(unsigned mode, unsigned *mask)
+{
+ unsigned brw_mode = 0;
+ *mask = 0;
+
+ if ((FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP16 |
+ FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP32 |
+ FLOAT_CONTROLS_ROUNDING_MODE_RTZ_FP64) &
+ mode) {
+ brw_mode |= BRW_RND_MODE_RTZ << BRW_CR0_RND_MODE_SHIFT;
+ *mask |= BRW_CR0_RND_MODE_MASK;
+ }
+ if ((FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP16 |
+ FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP32 |
+ FLOAT_CONTROLS_ROUNDING_MODE_RTE_FP64) &
+ mode) {
+ brw_mode |= BRW_RND_MODE_RTNE << BRW_CR0_RND_MODE_SHIFT;
+ *mask |= BRW_CR0_RND_MODE_MASK;
+ }
+ if (mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP16) {
+ brw_mode |= BRW_CR0_FP16_DENORM_PRESERVE;
+ *mask |= BRW_CR0_FP16_DENORM_PRESERVE;
+ }
+ if (mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP32) {
+ brw_mode |= BRW_CR0_FP32_DENORM_PRESERVE;
+ *mask |= BRW_CR0_FP32_DENORM_PRESERVE;
+ }
+ if (mode & FLOAT_CONTROLS_DENORM_PRESERVE_FP64) {
+ brw_mode |= BRW_CR0_FP64_DENORM_PRESERVE;
+ *mask |= BRW_CR0_FP64_DENORM_PRESERVE;
+ }
+ if (mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP16)
+ *mask |= BRW_CR0_FP16_DENORM_PRESERVE;
+ if (mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP32)
+ *mask |= BRW_CR0_FP32_DENORM_PRESERVE;
+ if (mode & FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO_FP64)
+ *mask |= BRW_CR0_FP64_DENORM_PRESERVE;
+ if (mode == FLOAT_CONTROLS_DEFAULT_FLOAT_CONTROL_MODE)
+ *mask |= BRW_CR0_FP_MODE_MASK;
+
+ return brw_mode;
+}
+
+void
+fs_visitor::emit_shader_float_controls_execution_mode()
+{
+ unsigned execution_mode = this->nir->info.float_controls_execution_mode;
+ if (execution_mode == FLOAT_CONTROLS_DEFAULT_FLOAT_CONTROL_MODE)
+ return;
+
+ fs_builder abld = bld.annotate("shader floats control execution mode");
+ unsigned mask = 0;
+ unsigned mode = brw_rnd_mode_from_nir(execution_mode, &mask);
+ abld.emit(SHADER_OPCODE_FLOAT_CONTROL_MODE, bld.null_reg_ud(),
+ brw_imm_d(mode), brw_imm_d(mask));
+}
+
/** Emits the interpolation for the varying inputs. */
void
fs_visitor::emit_interpolation_setup_gen6()