diff options
| -rw-r--r-- | src/intel/blorp/blorp_genX_exec.h | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index f7bdf6a2903..b4118162af3 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -1636,11 +1636,18 @@ blorp_emit_gen8_hiz_op(struct blorp_batch *batch, */ assert(params->depth.enabled || params->stencil.enabled); - /* The stencil buffer should only be enabled if a fast clear operation is - * requested. + /* The stencil buffer should only be enabled on GEN == 12, if a fast clear + * or full resolve operation is requested. On rest of the GEN, if a fast + * clear operation is requested. */ - if (params->stencil.enabled) + if (params->stencil.enabled) { +#if GEN_GEN >= 12 + assert(params->hiz_op == ISL_AUX_OP_FAST_CLEAR || + params->hiz_op == ISL_AUX_OP_FULL_RESOLVE); +#else assert(params->hiz_op == ISL_AUX_OP_FAST_CLEAR); +#endif + } /* From the BDW PRM Volume 2, 3DSTATE_WM_HZ_OP: * @@ -1696,7 +1703,13 @@ blorp_emit_gen8_hiz_op(struct blorp_batch *batch, break; case ISL_AUX_OP_FULL_RESOLVE: assert(params->full_surface_hiz_op); - hzp.DepthBufferResolveEnable = true; + hzp.DepthBufferResolveEnable = params->depth.enabled; +#if GEN_GEN >= 12 + if (params->stencil.enabled) { + assert(params->stencil.aux_usage == ISL_AUX_USAGE_CCS_E); + hzp.StencilBufferResolveEnable = true; + } +#endif break; case ISL_AUX_OP_AMBIGUATE: assert(params->full_surface_hiz_op); |