diff options
| -rw-r--r-- | src/intel/vulkan/genX_pipeline.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index 326fc30dd31..7e3a785c584 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -379,8 +379,8 @@ emit_3dstate_sbe(struct anv_pipeline *pipeline) /* We have to subtract two slots to accout for the URB entry output * read offset in the VS and GS stages. */ - assert(slot >= 2); const int source_attr = slot - 2 * urb_entry_read_offset; + assert(source_attr >= 0 && source_attr < 32); max_source_attr = MAX2(max_source_attr, source_attr); swiz.Attribute[input_index].SourceAttribute = source_attr; } |