diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index addacf2cf80..e5d3b5c7076 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -1283,6 +1283,21 @@ intel_resolve_for_dri2_flush(struct brw_context *brw, intel_miptree_prepare_external(brw, rb->mt); } else { intel_renderbuffer_downsample(brw, rb); + + /* Call prepare_external on the single-sample miptree to do any + * needed resolves prior to handing it off to the window system. + * This is needed in the case that rb->singlesample_mt is Y-tiled + * with CCS_E enabled but without I915_FORMAT_MOD_Y_TILED_CCS_E. In + * this case, the MSAA resolve above will write compressed data into + * rb->singlesample_mt. + * + * TODO: Some day, if we decide to care about the tiny performance + * hit we're taking by doing the MSAA resolve and then a CCS resolve, + * we could detect this case and just allocate the single-sampled + * miptree without aux. However, that would be a lot of plumbing and + * this is a rather exotic case so it's not really worth it. + */ + intel_miptree_prepare_external(brw, rb->singlesample_mt); } } } |