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-rw-r--r--src/intel/blorp/blorp.c2
-rw-r--r--src/intel/compiler/brw_nir.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_program.c5
3 files changed, 4 insertions, 5 deletions
diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
index 58d858dff00..73f8c67802e 100644
--- a/src/intel/blorp/blorp.c
+++ b/src/intel/blorp/blorp.c
@@ -204,7 +204,6 @@ blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx,
*/
wm_prog_data->base.binding_table.texture_start = BLORP_TEXTURE_BT_INDEX;
- nir_lower_deref_instrs(nir, ~0);
nir = brw_preprocess_nir(compiler, nir);
nir_remove_dead_variables(nir, nir_var_shader_in);
nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
@@ -234,7 +233,6 @@ blorp_compile_vs(struct blorp_context *blorp, void *mem_ctx,
nir->options =
compiler->glsl_compiler_options[MESA_SHADER_VERTEX].NirOptions;
- nir_lower_deref_instrs(nir, ~0);
nir = brw_preprocess_nir(compiler, nir);
nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 227c94d83b9..971854add4d 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -766,6 +766,8 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
OPT(nir_opt_dce);
OPT(nir_opt_move_comparisons);
+ OPT(nir_lower_deref_instrs, ~0);
+
OPT(nir_lower_locals_to_regs);
if (unlikely(debug_enabled)) {
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index faf706c7d15..aa2d86d1aa3 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -79,10 +79,10 @@ brw_create_nir(struct brw_context *brw,
if (shader_prog) {
if (shader_prog->data->spirv) {
nir = _mesa_spirv_to_nir(ctx, shader_prog, stage, options);
- nir_lower_deref_instrs(nir, ~0);
+ nir_lower_deref_instrs(nir, nir_lower_texture_derefs);
} else {
nir = glsl_to_nir(shader_prog, stage, options);
- nir_lower_deref_instrs(nir, ~0);
+ nir_lower_deref_instrs(nir, nir_lower_texture_derefs);
}
assert (nir);
@@ -93,7 +93,6 @@ brw_create_nir(struct brw_context *brw,
nir_shader_get_entrypoint(nir), true, false);
} else {
nir = prog_to_nir(prog, options);
- nir_lower_deref_instrs(nir, ~0);
NIR_PASS_V(nir, nir_lower_regs_to_ssa); /* turn registers into SSA */
}
nir_validate_shader(nir);