diff options
| -rw-r--r-- | src/broadcom/compiler/qpu_schedule.c | 2 | ||||
| -rw-r--r-- | src/broadcom/compiler/v3d_compiler.h | 2 | ||||
| -rw-r--r-- | src/broadcom/qpu/qpu_instr.c | 4 | ||||
| -rw-r--r-- | src/broadcom/qpu/qpu_instr.h | 2 | ||||
| -rw-r--r-- | src/broadcom/qpu/qpu_pack.c | 2 | ||||
| -rw-r--r-- | src/broadcom/qpu/tests/qpu_disasm.c | 1 |
6 files changed, 7 insertions, 6 deletions
diff --git a/src/broadcom/compiler/qpu_schedule.c b/src/broadcom/compiler/qpu_schedule.c index 5f3822e780b..2a035c5521e 100644 --- a/src/broadcom/compiler/qpu_schedule.c +++ b/src/broadcom/compiler/qpu_schedule.c @@ -343,7 +343,7 @@ calculate_deps(struct schedule_state *state, struct schedule_node *n) add_read_dep(state, state->last_sf, n); break; - case V3D_QPU_A_FLBPOP: + case V3D_QPU_A_FLPOP: add_write_dep(state, &state->last_sf, n); break; diff --git a/src/broadcom/compiler/v3d_compiler.h b/src/broadcom/compiler/v3d_compiler.h index f3e3875c87c..133c2e0b7d9 100644 --- a/src/broadcom/compiler/v3d_compiler.h +++ b/src/broadcom/compiler/v3d_compiler.h @@ -905,7 +905,7 @@ VIR_A_ALU1(NOT) VIR_A_ALU1(NEG) VIR_A_ALU1(FLAPUSH) VIR_A_ALU1(FLBPUSH) -VIR_A_ALU1(FLBPOP) +VIR_A_ALU1(FLPOP) VIR_A_ALU1(SETMSF) VIR_A_ALU1(SETREVF) VIR_A_ALU0(TIDX) diff --git a/src/broadcom/qpu/qpu_instr.c b/src/broadcom/qpu/qpu_instr.c index 213a0826a59..9e051e6c433 100644 --- a/src/broadcom/qpu/qpu_instr.c +++ b/src/broadcom/qpu/qpu_instr.c @@ -106,7 +106,7 @@ v3d_qpu_add_op_name(enum v3d_qpu_add_op op) [V3D_QPU_A_NEG] = "neg", [V3D_QPU_A_FLAPUSH] = "flapush", [V3D_QPU_A_FLBPUSH] = "flbpush", - [V3D_QPU_A_FLBPOP] = "flbpop", + [V3D_QPU_A_FLPOP] = "flpop", [V3D_QPU_A_SETMSF] = "setmsf", [V3D_QPU_A_SETREVF] = "setrevf", [V3D_QPU_A_NOP] = "nop", @@ -368,7 +368,7 @@ static const uint8_t add_op_args[] = { [V3D_QPU_A_NEG] = D | A, [V3D_QPU_A_FLAPUSH] = D | A, [V3D_QPU_A_FLBPUSH] = D | A, - [V3D_QPU_A_FLBPOP] = D | A, + [V3D_QPU_A_FLPOP] = D | A, [V3D_QPU_A_SETMSF] = D | A, [V3D_QPU_A_SETREVF] = D | A, [V3D_QPU_A_NOP] = 0, diff --git a/src/broadcom/qpu/qpu_instr.h b/src/broadcom/qpu/qpu_instr.h index e5e9a9a3f1f..d99bb9db53b 100644 --- a/src/broadcom/qpu/qpu_instr.h +++ b/src/broadcom/qpu/qpu_instr.h @@ -165,7 +165,7 @@ enum v3d_qpu_add_op { V3D_QPU_A_NEG, V3D_QPU_A_FLAPUSH, V3D_QPU_A_FLBPUSH, - V3D_QPU_A_FLBPOP, + V3D_QPU_A_FLPOP, V3D_QPU_A_SETMSF, V3D_QPU_A_SETREVF, V3D_QPU_A_NOP, diff --git a/src/broadcom/qpu/qpu_pack.c b/src/broadcom/qpu/qpu_pack.c index 4615fd35d06..d2e878d70e8 100644 --- a/src/broadcom/qpu/qpu_pack.c +++ b/src/broadcom/qpu/qpu_pack.c @@ -492,7 +492,7 @@ static const struct opcode_desc add_ops[] = { { 186, 186, 1 << 1, ANYMUX, V3D_QPU_A_NEG }, { 186, 186, 1 << 2, ANYMUX, V3D_QPU_A_FLAPUSH }, { 186, 186, 1 << 3, ANYMUX, V3D_QPU_A_FLBPUSH }, - { 186, 186, 1 << 4, ANYMUX, V3D_QPU_A_FLBPOP }, + { 186, 186, 1 << 4, ANYMUX, V3D_QPU_A_FLPOP }, { 186, 186, 1 << 6, ANYMUX, V3D_QPU_A_SETMSF }, { 186, 186, 1 << 7, ANYMUX, V3D_QPU_A_SETREVF }, { 187, 187, 1 << 0, 1 << 0, V3D_QPU_A_NOP, 0 }, diff --git a/src/broadcom/qpu/tests/qpu_disasm.c b/src/broadcom/qpu/tests/qpu_disasm.c index ae502ae2e50..7237912b8bd 100644 --- a/src/broadcom/qpu/tests/qpu_disasm.c +++ b/src/broadcom/qpu/tests/qpu_disasm.c @@ -40,6 +40,7 @@ static const struct { { 33, 0x3c002380b6edb000ull, "or rf0, r3, r3 ; mov vpm, r3" }, { 33, 0x57403006bbb80000ull, "nop ; fmul r0, rf0, r5 ; ldvpm; ldunif" }, { 33, 0x9c094adef634b000ull, "ffloor.ifb rf30.l, r3; fmul.pushz rf43.l, r5, r1.h" }, + { 33, 0xb0044c56ba326840ull, "flpop rf22, rf33 ; fmul.pushz rf49.l, r4.h, r1.abs" }, /* vfmul input packing */ { 33, 0x101e8b6e8aad4000ull, "fmax.nornn rf46, r4.l, r2.l; vfmul.ifnb rf45, r3, r5" }, |