diff options
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_shader.cpp | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_shader.h | 1 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp | 2 |
4 files changed, 5 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp index 4d14fda4a86..c9deb6d6235 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp @@ -2164,7 +2164,7 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder &bld, if (indirect_offset.file != BAD_FILE) { srcs[header_regs++] = indirect_offset; - } else if (tcs_key->program_string_id != 0) { + } else if (!is_passthrough_shader) { if (imm_offset == 0) { value.type = BRW_REGISTER_TYPE_F; diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index 068244b299d..f3d7c777d8d 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -646,6 +646,8 @@ backend_shader::backend_shader(const struct brw_compiler *compiler, debug_enabled = INTEL_DEBUG & intel_debug_flag_for_shader_stage(stage); stage_name = _mesa_shader_stage_to_string(stage); stage_abbrev = _mesa_shader_stage_to_abbrev(stage); + is_passthrough_shader = + nir->info.name && strcmp(nir->info.name, "passthrough") == 0; } bool diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index d77531c11da..0acaa4df1dc 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++ b/src/mesa/drivers/dri/i965/brw_shader.h @@ -208,6 +208,7 @@ public: bool debug_enabled; const char *stage_name; const char *stage_abbrev; + bool is_passthrough_shader; brw::simple_allocator alloc; diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp index 4da30b9c47d..6d39474e251 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp @@ -349,7 +349,7 @@ vec4_tcs_visitor::nir_emit_intrinsic(nir_intrinsic_instr *instr) /* The passthrough shader writes the whole patch header as two vec4s; * skip all the gl_TessLevelInner/Outer swizzling. */ - if (indirect_offset.file == BAD_FILE && key->program_string_id != 0) { + if (indirect_offset.file == BAD_FILE && !is_passthrough_shader) { if (imm_offset == 0) { value.type = BRW_REGISTER_TYPE_F; |