diff options
| -rw-r--r-- | src/intel/compiler/brw_compiler.h | 2 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs.cpp | 8 | ||||
| -rw-r--r-- | src/intel/compiler/brw_shader.cpp | 12 | ||||
| -rw-r--r-- | src/intel/compiler/brw_vec4.cpp | 1 | ||||
| -rw-r--r-- | src/intel/compiler/brw_vec4_gs_visitor.cpp | 14 | ||||
| -rw-r--r-- | src/intel/compiler/brw_vec4_tcs.cpp | 12 |
6 files changed, 35 insertions, 14 deletions
diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h index 17615c6dd9f..fa5a3bf0274 100644 --- a/src/intel/compiler/brw_compiler.h +++ b/src/intel/compiler/brw_compiler.h @@ -587,6 +587,8 @@ struct brw_stage_prog_data { unsigned total_scratch; unsigned total_shared; + unsigned program_size; + /** * Register where the thread expects to find input data from the URB * (typically uniforms, followed by vertex or fragment attributes). diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index e5467922553..d355675b2b8 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -6691,7 +6691,9 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data, prog_data->reg_blocks_0 = brw_register_blocks(simd16_grf_used); } - return g.get_assembly(final_assembly_size); + const unsigned *assembly = g.get_assembly(final_assembly_size); + prog_data->base.program_size = *final_assembly_size; + return assembly; } fs_reg * @@ -6890,7 +6892,9 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data, g.generate_code(cfg, prog_data->simd_size); - return g.get_assembly(final_assembly_size); + const unsigned *assembly = g.get_assembly(final_assembly_size); + prog_data->base.program_size = *final_assembly_size; + return assembly; } /** diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index ddb941c1cbf..7253f5d5531 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -1162,6 +1162,7 @@ brw_compile_tes(const struct brw_compiler *compiler, { const struct gen_device_info *devinfo = compiler->devinfo; const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_EVAL]; + const unsigned *assembly; nir_shader *nir = nir_shader_clone(mem_ctx, src_shader); nir->info.inputs_read = key->inputs_read; @@ -1270,7 +1271,7 @@ brw_compile_tes(const struct brw_compiler *compiler, g.generate_code(v.cfg, 8); - return g.get_assembly(final_assembly_size); + assembly = g.get_assembly(final_assembly_size); } else { brw::vec4_tes_visitor v(compiler, log_data, key, prog_data, nir, mem_ctx, shader_time_index); @@ -1283,8 +1284,11 @@ brw_compile_tes(const struct brw_compiler *compiler, if (unlikely(INTEL_DEBUG & DEBUG_TES)) v.dump_instructions(); - return brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, - &prog_data->base, v.cfg, - final_assembly_size); + assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, + &prog_data->base, v.cfg, + final_assembly_size); } + + prog_data->base.base.program_size = *final_assembly_size; + return assembly; } diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp index c21d3f49c2e..7d8cdfa74a3 100644 --- a/src/intel/compiler/brw_vec4.cpp +++ b/src/intel/compiler/brw_vec4.cpp @@ -2901,6 +2901,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data, final_assembly_size); } + prog_data->base.base.program_size = *final_assembly_size; return assembly; } diff --git a/src/intel/compiler/brw_vec4_gs_visitor.cpp b/src/intel/compiler/brw_vec4_gs_visitor.cpp index 5df6d562ce6..11b73f187cf 100644 --- a/src/intel/compiler/brw_vec4_gs_visitor.cpp +++ b/src/intel/compiler/brw_vec4_gs_visitor.cpp @@ -868,7 +868,9 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data, g.enable_debug(name); } g.generate_code(v.cfg, 8); - return g.get_assembly(final_assembly_size); + const unsigned *ret = g.get_assembly(final_assembly_size); + prog_data->base.base.program_size = *final_assembly_size; + return ret; } } @@ -897,9 +899,12 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data, if (v.run()) { /* Success! Backup is not needed */ ralloc_free(param); - return brw_vec4_generate_assembly(compiler, log_data, mem_ctx, - shader, &prog_data->base, v.cfg, - final_assembly_size); + const unsigned *ret = + brw_vec4_generate_assembly(compiler, log_data, mem_ctx, shader, + &prog_data->base, v.cfg, + final_assembly_size); + prog_data->base.base.program_size = *final_assembly_size; + return ret; } else { /* These variables could be modified by the execution of the GS * visitor if it packed the uniforms in the push constant buffer. @@ -967,6 +972,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data, } delete gs; + prog_data->base.base.program_size = *final_assembly_size; return ret; } diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp index c4d9f89a91b..04feb6bdf17 100644 --- a/src/intel/compiler/brw_vec4_tcs.cpp +++ b/src/intel/compiler/brw_vec4_tcs.cpp @@ -388,6 +388,7 @@ brw_compile_tcs(const struct brw_compiler *compiler, const struct gen_device_info *devinfo = compiler->devinfo; struct brw_vue_prog_data *vue_prog_data = &prog_data->base; const bool is_scalar = compiler->scalar_stage[MESA_SHADER_TESS_CTRL]; + const unsigned *assembly; nir_shader *nir = nir_shader_clone(mem_ctx, src_shader); nir->info.outputs_written = key->outputs_written; @@ -487,7 +488,7 @@ brw_compile_tcs(const struct brw_compiler *compiler, g.generate_code(v.cfg, 8); - return g.get_assembly(final_assembly_size); + assembly = g.get_assembly(final_assembly_size); } else { vec4_tcs_visitor v(compiler, log_data, key, prog_data, nir, mem_ctx, shader_time_index, &input_vue_map); @@ -501,10 +502,13 @@ brw_compile_tcs(const struct brw_compiler *compiler, v.dump_instructions(); - return brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, - &prog_data->base, v.cfg, - final_assembly_size); + assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir, + &prog_data->base, v.cfg, + final_assembly_size); } + + prog_data->base.base.program_size = *final_assembly_size; + return assembly; } |