diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_depth_state.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c index ec296698267..a7e61354fd5 100644 --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c @@ -477,6 +477,18 @@ gen8_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, break; case BLORP_HIZ_OP_DEPTH_CLEAR: dw1 |= GEN8_WM_HZ_DEPTH_CLEAR; + + /* The "Clear Rectangle X Max" (and Y Max) fields are exclusive, + * rather than inclusive, and limited to 16383. This means that + * for a 16384x16384 render target, we would miss the last row + * or column of pixels along the edge. + * + * To work around this, we have to set the "Full Surface Depth + * and Stencil Clear" bit. We can do this in all cases because + * we always clear the full rectangle anyway. We'll need to + * change this if we ever add scissored clear support. + */ + dw1 |= GEN8_WM_HZ_FULL_SURFACE_DEPTH_CLEAR; break; case BLORP_HIZ_OP_NONE: unreachable("Should not get here."); |