diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clip.c | 23 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clip.h | 11 |
2 files changed, 1 insertions, 33 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c index 8929160acd9..32c0778ff1f 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.c +++ b/src/mesa/drivers/dri/i965/brw_clip.c @@ -56,7 +56,6 @@ static void compile_clip_prog( struct brw_context *brw, const GLuint *program; void *mem_ctx; GLuint program_size; - GLuint delta; GLuint i; memset(&c, 0, sizeof(c)); @@ -73,26 +72,6 @@ static void compile_clip_prog( struct brw_context *brw, brw_compute_vue_map(&c.vue_map, intel, c.key.nr_userclip, c.key.do_twoside_color, c.key.attrs); - /* Need to locate the two positions present in vertex + header. - * These are currently hardcoded: - */ - if (intel->gen == 5) - c.header_regs = 3; - else - c.header_regs = 1; - - delta = c.header_regs * REG_SIZE; - - for (i = 0; i < VERT_RESULT_MAX; i++) { - if (c.key.attrs & BITFIELD64_BIT(i)) { - c.offset[i] = delta; - delta += ATTR_SIZE; - - c.idx_to_attr[c.nr_attrs] = i; - c.nr_attrs++; - } - } - /* nr_regs is the number of registers filled by reading data from the VUE. * This program accesses the entire VUE, so nr_regs needs to be the size of * the VUE (measured in pairs, since two slots are stored in each @@ -100,8 +79,6 @@ static void compile_clip_prog( struct brw_context *brw, */ c.nr_regs = (c.vue_map.num_slots + 1)/2; - c.nr_bytes = c.nr_regs * REG_SIZE; - c.prog_data.clip_mode = c.key.clip_mode; /* XXX */ /* For some reason the thread is spawned with only 4 channels diff --git a/src/mesa/drivers/dri/i965/brw_clip.h b/src/mesa/drivers/dri/i965/brw_clip.h index 109a0b62d0a..97372849ef3 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.h +++ b/src/mesa/drivers/dri/i965/brw_clip.h @@ -104,23 +104,14 @@ struct brw_clip_compile { struct brw_reg ff_sync; } reg; - /* 3 different ways of expressing vertex size: - */ - GLuint nr_attrs; + /* Number of registers storing VUE data */ GLuint nr_regs; - GLuint nr_bytes; GLuint first_tmp; GLuint last_tmp; GLboolean need_direction; - GLuint header_regs; - /** Mapping from VERT_RESULT_* to offset within the VUE. */ - GLuint offset[VERT_RESULT_MAX]; - /** Mapping from attribute index to VERT_RESULT_* */ - GLuint idx_to_attr[VERT_RESULT_MAX]; - struct brw_vue_map vue_map; }; |