diff options
24 files changed, 72 insertions, 72 deletions
diff --git a/src/mesa/drivers/dri/common/utils.c b/src/mesa/drivers/dri/common/utils.c index bb22107e9d8..70d34e8ce55 100644 --- a/src/mesa/drivers/dri/common/utils.c +++ b/src/mesa/drivers/dri/common/utils.c @@ -227,7 +227,7 @@ driCreateConfigs(mesa_format format, break; default: fprintf(stderr, "[%s:%u] Unknown framebuffer type %s (%d).\n", - __FUNCTION__, __LINE__, + __func__, __LINE__, _mesa_get_format_name(format), format); return NULL; } diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index 78ac58efc09..131e1558f38 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -194,7 +194,7 @@ intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, } DBG("%s %s to mt %p level %d layer %d\n", - __FUNCTION__, opname, mt, level, layer); + __func__, opname, mt, level, layer); if (brw->gen >= 8) { gen8_hiz_exec(brw, mt, level, layer, op); diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index 644cb4170b6..d25e2017b87 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp @@ -78,7 +78,7 @@ brw_blorp_blit_miptrees(struct brw_context *brw, DBG("%s from %dx %s mt %p %d %d (%f,%f) (%f,%f)" "to %dx %s mt %p %d %d (%f,%f) (%f,%f) (flip %d,%d)\n", - __FUNCTION__, + __func__, src_mt->num_samples, _mesa_get_format_name(src_mt->format), src_mt, src_level, src_layer, src_x0, src_y0, src_x1, src_y1, dst_mt->num_samples, _mesa_get_format_name(dst_mt->format), dst_mt, diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index a4884edeb53..c7e1e812aaf 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -725,7 +725,7 @@ brwCreateContext(gl_api api, struct brw_context *brw = rzalloc(NULL, struct brw_context); if (!brw) { - fprintf(stderr, "%s: failed to alloc context\n", __FUNCTION__); + fprintf(stderr, "%s: failed to alloc context\n", __func__); *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY; return false; } @@ -781,7 +781,7 @@ brwCreateContext(gl_api api, if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) { *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY; - fprintf(stderr, "%s: failed to init mesa context\n", __FUNCTION__); + fprintf(stderr, "%s: failed to init mesa context\n", __func__); intelDestroyContext(driContextPriv); return false; } diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index b1af0d7b115..320e40e1007 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -413,7 +413,7 @@ brw_prepare_vertices(struct brw_context *brw) } if (0) - fprintf(stderr, "%s %d..%d\n", __FUNCTION__, min_index, max_index); + fprintf(stderr, "%s %d..%d\n", __func__, min_index, max_index); /* Accumulate the list of enabled arrays. */ brw->vb.nr_enabled = 0; diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c index 89508e4bd2f..606740ec691 100644 --- a/src/mesa/drivers/dri/i965/brw_state_cache.c +++ b/src/mesa/drivers/dri/i965/brw_state_cache.c @@ -374,7 +374,7 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache *cache) struct brw_cache_item *c, *next; GLuint i; - DBG("%s\n", __FUNCTION__); + DBG("%s\n", __func__); for (i = 0; i < cache->size; i++) { for (c = cache->items[i]; c; c = next) { @@ -422,7 +422,7 @@ static void brw_destroy_cache(struct brw_context *brw, struct brw_cache *cache) { - DBG("%s\n", __FUNCTION__); + DBG("%s\n", __func__); if (brw->has_llc) drm_intel_bo_unmap(cache->bo); diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c index 7a1e09d692c..75b409c3483 100644 --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c @@ -459,7 +459,7 @@ brw_miptree_layout(struct brw_context *brw, struct intel_mipmap_tree *mt) } break; } - DBG("%s: %dx%dx%d\n", __FUNCTION__, + DBG("%s: %dx%dx%d\n", __func__, mt->total_width, mt->total_height, mt->cpp); } diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index c9dac5be0b4..161d140a3df 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -669,7 +669,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw, format = brw->render_target_format[rb_format]; if (unlikely(!brw->format_supported_as_render_target[rb_format])) { _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n", - __FUNCTION__, _mesa_get_format_name(rb_format)); + __func__, _mesa_get_format_name(rb_format)); } surf[0] = (BRW_SURFACE_2D << BRW_SURFACE_TYPE_SHIFT | diff --git a/src/mesa/drivers/dri/i965/gen6_surface_state.c b/src/mesa/drivers/dri/i965/gen6_surface_state.c index 080e0f348fa..fadc3530978 100644 --- a/src/mesa/drivers/dri/i965/gen6_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen6_surface_state.c @@ -74,7 +74,7 @@ gen6_update_renderbuffer_surface(struct brw_context *brw, format = brw->render_target_format[rb_format]; if (unlikely(!brw->format_supported_as_render_target[rb_format])) { _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n", - __FUNCTION__, _mesa_get_format_name(rb_format)); + __func__, _mesa_get_format_name(rb_format)); } switch (gl_target) { diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 18bcb8af012..10567f3d83f 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -468,7 +468,7 @@ gen7_update_renderbuffer_surface(struct brw_context *brw, format = brw->render_target_format[rb_format]; if (unlikely(!brw->format_supported_as_render_target[rb_format])) { _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n", - __FUNCTION__, _mesa_get_format_name(rb_format)); + __func__, _mesa_get_format_name(rb_format)); } switch (gl_target) { diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index ba59b054b14..011c6858b10 100644 --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c @@ -369,7 +369,7 @@ gen8_update_renderbuffer_surface(struct brw_context *brw, format = brw->render_target_format[rb_format]; if (unlikely(!brw->format_supported_as_render_target[rb_format])) _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n", - __FUNCTION__, _mesa_get_format_name(rb_format)); + __func__, _mesa_get_format_name(rb_format)); } if (mt->mcs_mt) { diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 9500bd70e81..4993f60c776 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -178,7 +178,7 @@ intel_miptree_blit(struct brw_context *brw, (dst_format != MESA_FORMAT_B8G8R8A8_UNORM && dst_format != MESA_FORMAT_B8G8R8X8_UNORM))) { perf_debug("%s: Can't use hardware blitter from %s to %s, " - "falling back.\n", __FUNCTION__, + "falling back.\n", __func__, _mesa_get_format_name(src_format), _mesa_get_format_name(dst_format)); return false; @@ -330,7 +330,7 @@ intelEmitCopyBlit(struct brw_context *brw, intel_batchbuffer_require_space(brw, length * 4, BLT_RING); DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n", - __FUNCTION__, + __func__, src_buffer, src_pitch, src_offset, src_x, src_y, dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h); @@ -456,7 +456,7 @@ intelEmitImmediateColorExpandBlit(struct brw_context *brw, return true; DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n", - __FUNCTION__, + __func__, dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords); unsigned xy_setup_blt_length = brw->gen >= 8 ? 10 : 8; @@ -581,7 +581,7 @@ intel_miptree_set_alpha_to_one(struct brw_context *brw, cpp = mt->cpp; DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n", - __FUNCTION__, mt->bo, pitch, x, y, width, height); + __func__, mt->bo, pitch, x, y, width, height); BR13 = br13_for_cpp(cpp) | 0xf0 << 16; CMD = XY_COLOR_BLT_CMD; diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index 8a398f73e49..aebed723f75 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b/src/mesa/drivers/dri/i965/intel_fbo.c @@ -190,7 +190,7 @@ intel_map_renderbuffer(struct gl_context *ctx, } DBG("%s: rb %d (%s) mt mapped: (%d, %d) (%dx%d) -> %p/%"PRIdPTR"\n", - __FUNCTION__, rb->Name, _mesa_get_format_name(rb->Format), + __func__, rb->Name, _mesa_get_format_name(rb->Format), x, y, w, h, map, stride); *out_map = map; @@ -214,7 +214,7 @@ intel_unmap_renderbuffer(struct gl_context *ctx, struct intel_renderbuffer *irb = intel_renderbuffer(rb); struct intel_mipmap_tree *mt; - DBG("%s: rb %d (%s)\n", __FUNCTION__, + DBG("%s: rb %d (%s)\n", __func__, rb->Name, _mesa_get_format_name(rb->Format)); if (srb->Buffer) { @@ -309,7 +309,7 @@ intel_alloc_private_renderbuffer_storage(struct gl_context * ctx, struct gl_rend intel_miptree_release(&irb->mt); - DBG("%s: %s: %s (%dx%d)\n", __FUNCTION__, + DBG("%s: %s: %s (%dx%d)\n", __func__, _mesa_lookup_enum_by_nr(internalFormat), _mesa_get_format_name(rb->Format), width, height); @@ -662,7 +662,7 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb) struct intel_mipmap_tree *depth_mt = NULL, *stencil_mt = NULL; int i; - DBG("%s() on fb %p (%s)\n", __FUNCTION__, + DBG("%s() on fb %p (%s)\n", __func__, fb, (fb == ctx->DrawBuffer ? "drawbuffer" : (fb == ctx->ReadBuffer ? "readbuffer" : "other buffer"))); diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 0424a879f7f..9e311f06f45 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -253,7 +253,7 @@ intel_miptree_create_layout(struct brw_context *brw, if (!mt) return NULL; - DBG("%s target %s format %s level %d..%d slices %d <-- %p\n", __FUNCTION__, + DBG("%s target %s format %s level %d..%d slices %d <-- %p\n", __func__, _mesa_lookup_enum_by_nr(target), _mesa_get_format_name(format), first_level, last_level, depth0, mt); @@ -885,7 +885,7 @@ intel_miptree_reference(struct intel_mipmap_tree **dst, if (src) { src->refcount++; - DBG("%s %p refcount now %d\n", __FUNCTION__, src, src->refcount); + DBG("%s %p refcount now %d\n", __func__, src, src->refcount); } *dst = src; @@ -898,11 +898,11 @@ intel_miptree_release(struct intel_mipmap_tree **mt) if (!*mt) return; - DBG("%s %p refcount will be %d\n", __FUNCTION__, *mt, (*mt)->refcount - 1); + DBG("%s %p refcount will be %d\n", __func__, *mt, (*mt)->refcount - 1); if (--(*mt)->refcount <= 0) { GLuint i; - DBG("%s deleting %p\n", __FUNCTION__, *mt); + DBG("%s deleting %p\n", __func__, *mt); drm_intel_bo_unreference((*mt)->bo); intel_miptree_release(&(*mt)->stencil_mt); @@ -1018,7 +1018,7 @@ intel_miptree_set_level_info(struct intel_mipmap_tree *mt, mt->level[level].level_x = x; mt->level[level].level_y = y; - DBG("%s level %d, depth %d, offset %d,%d\n", __FUNCTION__, + DBG("%s level %d, depth %d, offset %d,%d\n", __func__, level, d, x, y); assert(mt->level[level].slice == NULL); @@ -1043,7 +1043,7 @@ intel_miptree_set_image_offset(struct intel_mipmap_tree *mt, mt->level[level].slice[img].y_offset = mt->level[level].level_y + y; DBG("%s level %d img %d pos %d,%d\n", - __FUNCTION__, level, img, + __func__, level, img, mt->level[level].slice[img].x_offset, mt->level[level].slice[img].y_offset); } @@ -2093,7 +2093,7 @@ intel_miptree_map_gtt(struct brw_context *brw, } DBG("%s: %d,%d %dx%d from mt %p (%s) " - "%"PRIiPTR",%"PRIiPTR" = %p/%d\n", __FUNCTION__, + "%"PRIiPTR",%"PRIiPTR" = %p/%d\n", __func__, map->x, map->y, map->w, map->h, mt, _mesa_get_format_name(mt->format), x, y, map->ptr, map->stride); @@ -2146,7 +2146,7 @@ intel_miptree_map_blit(struct brw_context *brw, map->ptr = intel_miptree_map_raw(brw, map->mt); - DBG("%s: %d,%d %dx%d from mt %p (%s) %d,%d = %p/%d\n", __FUNCTION__, + DBG("%s: %d,%d %dx%d from mt %p (%s) %d,%d = %p/%d\n", __func__, map->x, map->y, map->w, map->h, mt, _mesa_get_format_name(mt->format), level, slice, map->ptr, map->stride); @@ -2196,7 +2196,7 @@ intel_miptree_map_movntdqa(struct brw_context *brw, assert(map->mode & GL_MAP_READ_BIT); assert(!(map->mode & GL_MAP_WRITE_BIT)); - DBG("%s: %d,%d %dx%d from mt %p (%s) %d,%d = %p/%d\n", __FUNCTION__, + DBG("%s: %d,%d %dx%d from mt %p (%s) %d,%d = %p/%d\n", __func__, map->x, map->y, map->w, map->h, mt, _mesa_get_format_name(mt->format), level, slice, map->ptr, map->stride); @@ -2291,11 +2291,11 @@ intel_miptree_map_s8(struct brw_context *brw, intel_miptree_unmap_raw(brw, mt); - DBG("%s: %d,%d %dx%d from mt %p %d,%d = %p/%d\n", __FUNCTION__, + DBG("%s: %d,%d %dx%d from mt %p %d,%d = %p/%d\n", __func__, map->x, map->y, map->w, map->h, mt, map->x + image_x, map->y + image_y, map->ptr, map->stride); } else { - DBG("%s: %d,%d %dx%d from mt %p = %p/%d\n", __FUNCTION__, + DBG("%s: %d,%d %dx%d from mt %p = %p/%d\n", __func__, map->x, map->y, map->w, map->h, mt, map->ptr, map->stride); } @@ -2453,13 +2453,13 @@ intel_miptree_map_depthstencil(struct brw_context *brw, intel_miptree_unmap_raw(brw, z_mt); DBG("%s: %d,%d %dx%d from z mt %p %d,%d, s mt %p %d,%d = %p/%d\n", - __FUNCTION__, + __func__, map->x, map->y, map->w, map->h, z_mt, map->x + z_image_x, map->y + z_image_y, s_mt, map->x + s_image_x, map->y + s_image_y, map->ptr, map->stride); } else { - DBG("%s: %d,%d %dx%d from mt %p = %p/%d\n", __FUNCTION__, + DBG("%s: %d,%d %dx%d from mt %p = %p/%d\n", __func__, map->x, map->y, map->w, map->h, mt, map->ptr, map->stride); } @@ -2513,7 +2513,7 @@ intel_miptree_unmap_depthstencil(struct brw_context *brw, intel_miptree_unmap_raw(brw, z_mt); DBG("%s: %d,%d %dx%d from z mt %p (%s) %d,%d, s mt %p %d,%d = %p/%d\n", - __FUNCTION__, + __func__, map->x, map->y, map->w, map->h, z_mt, _mesa_get_format_name(z_mt->format), map->x + z_image_x, map->y + z_image_y, @@ -2692,7 +2692,7 @@ intel_miptree_unmap(struct brw_context *brw, if (!map) return; - DBG("%s: mt %p (%s) level %d slice %d\n", __FUNCTION__, + DBG("%s: mt %p (%s) level %d slice %d\n", __func__, mt, _mesa_get_format_name(mt->format), level, slice); if (mt->format == MESA_FORMAT_S_UINT8) { diff --git a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c index 1b3f952f4fb..224dc6572cc 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c @@ -120,7 +120,7 @@ static GLuint get_bitmap_rect(GLsizei width, GLsizei height, GLuint count = 0; DBG("%s %d,%d %dx%d bitmap %dx%d skip %d src_offset %d mask %d\n", - __FUNCTION__, x,y,w,h,width,height,unpack->SkipPixels, src_offset, mask); + __func__, x,y,w,h,width,height,unpack->SkipPixels, src_offset, mask); if (invert) { first = h-1; diff --git a/src/mesa/drivers/dri/i965/intel_pixel_copy.c b/src/mesa/drivers/dri/i965/intel_pixel_copy.c index d928e1dfd70..ce053edbe36 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_copy.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_copy.c @@ -181,7 +181,7 @@ do_blit_copypixels(struct gl_context * ctx, width, height, (ctx->Color.ColorLogicOpEnabled ? ctx->Color.LogicOp : GL_COPY))) { - DBG("%s: blit failure\n", __FUNCTION__); + DBG("%s: blit failure\n", __func__); return false; } @@ -190,7 +190,7 @@ do_blit_copypixels(struct gl_context * ctx, out: - DBG("%s: success\n", __FUNCTION__); + DBG("%s: success\n", __func__); return true; } @@ -201,7 +201,7 @@ intelCopyPixels(struct gl_context * ctx, GLsizei width, GLsizei height, GLint destx, GLint desty, GLenum type) { - DBG("%s\n", __FUNCTION__); + DBG("%s\n", __func__); if (!_mesa_check_conditional_render(ctx)) return; diff --git a/src/mesa/drivers/dri/i965/intel_pixel_draw.c b/src/mesa/drivers/dri/i965/intel_pixel_draw.c index 055ab42cb6d..4ecefc8cf54 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_draw.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_draw.c @@ -61,13 +61,13 @@ do_blit_drawpixels(struct gl_context * ctx, GLuint src_offset; drm_intel_bo *src_buffer; - DBG("%s\n", __FUNCTION__); + DBG("%s\n", __func__); if (!intel_check_blit_fragment_ops(ctx, false)) return false; if (ctx->DrawBuffer->_NumColorDrawBuffers != 1) { - DBG("%s: fallback due to MRT\n", __FUNCTION__); + DBG("%s: fallback due to MRT\n", __func__); return false; } @@ -78,13 +78,13 @@ do_blit_drawpixels(struct gl_context * ctx, if (!_mesa_format_matches_format_and_type(irb->mt->format, format, type, false)) { - DBG("%s: bad format for blit\n", __FUNCTION__); + DBG("%s: bad format for blit\n", __func__); return false; } if (unpack->SwapBytes || unpack->LsbFirst || unpack->SkipPixels || unpack->SkipRows) { - DBG("%s: bad packing params\n", __FUNCTION__); + DBG("%s: bad packing params\n", __func__); return false; } @@ -122,7 +122,7 @@ do_blit_drawpixels(struct gl_context * ctx, irb->mt, irb->mt_level, irb->mt_layer, x, y, _mesa_is_winsys_fbo(ctx->DrawBuffer), width, height, GL_COPY)) { - DBG("%s: blit failed\n", __FUNCTION__); + DBG("%s: blit failed\n", __func__); intel_miptree_release(&pbo_mt); return false; } @@ -132,7 +132,7 @@ do_blit_drawpixels(struct gl_context * ctx, if (ctx->Query.CurrentOcclusionObject) ctx->Query.CurrentOcclusionObject->Result += width * height; - DBG("%s: success\n", __FUNCTION__); + DBG("%s: success\n", __func__); return true; } @@ -162,7 +162,7 @@ intelDrawPixels(struct gl_context * ctx, return; } - perf_debug("%s: fallback to generic code in PBO case\n", __FUNCTION__); + perf_debug("%s: fallback to generic code in PBO case\n", __func__); } _mesa_meta_DrawPixels(ctx, x, y, width, height, format, type, diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c index 09721211fa4..d3ca38b6ecd 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_read.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c @@ -164,7 +164,7 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx, error = brw_bo_map(brw, bo, false /* write enable */, "miptree"); if (error) { - DBG("%s: failed to map bo\n", __FUNCTION__); + DBG("%s: failed to map bo\n", __func__); return false; } @@ -191,7 +191,7 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx, DBG("%s: x,y=(%d,%d) (w,h)=(%d,%d) format=0x%x type=0x%x " "mesa_format=0x%x tiling=%d " "pack=(alignment=%d row_length=%d skip_pixels=%d skip_rows=%d)\n", - __FUNCTION__, xoffset, yoffset, width, height, + __func__, xoffset, yoffset, width, height, format, type, rb->Format, irb->mt->tiling, pack->Alignment, pack->RowLength, pack->SkipPixels, pack->SkipRows); @@ -222,14 +222,14 @@ intelReadPixels(struct gl_context * ctx, struct brw_context *brw = brw_context(ctx); bool dirty; - DBG("%s\n", __FUNCTION__); + DBG("%s\n", __func__); if (_mesa_is_bufferobj(pack->BufferObj)) { if (_mesa_meta_pbo_GetTexSubImage(ctx, 2, NULL, x, y, 0, width, height, 1, format, type, pixels, pack)) return; - perf_debug("%s: fallback to CPU mapping in PBO case\n", __FUNCTION__); + perf_debug("%s: fallback to CPU mapping in PBO case\n", __func__); } ok = intel_readpixels_tiled_memcpy(ctx, x, y, width, height, diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index cb9710fc6e6..5a9207af330 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -706,7 +706,7 @@ intel_create_image_from_fds(__DRIscreen *screen, if (f->nplanes == 1) { image->offset = image->offsets[0]; - intel_image_warn_if_unaligned(image, __FUNCTION__); + intel_image_warn_if_unaligned(image, __func__); } return image; @@ -797,7 +797,7 @@ intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate) image->pitch = stride; image->offset = offset; - intel_image_warn_if_unaligned(image, __FUNCTION__); + intel_image_warn_if_unaligned(image, __func__); return image; } diff --git a/src/mesa/drivers/dri/i965/intel_tex.c b/src/mesa/drivers/dri/i965/intel_tex.c index 3335fd1ff0d..777a682ad21 100644 --- a/src/mesa/drivers/dri/i965/intel_tex.c +++ b/src/mesa/drivers/dri/i965/intel_tex.c @@ -15,7 +15,7 @@ static struct gl_texture_image * intelNewTextureImage(struct gl_context * ctx) { - DBG("%s\n", __FUNCTION__); + DBG("%s\n", __func__); (void) ctx; return (struct gl_texture_image *) CALLOC_STRUCT(intel_texture_image); } @@ -35,7 +35,7 @@ intelNewTextureObject(struct gl_context * ctx, GLuint name, GLenum target) (void) ctx; - DBG("%s\n", __FUNCTION__); + DBG("%s\n", __func__); if (obj == NULL) return NULL; @@ -88,7 +88,7 @@ intel_alloc_texture_image_buffer(struct gl_context *ctx, intel_miptree_match_image(intel_texobj->mt, image)) { intel_miptree_reference(&intel_image->mt, intel_texobj->mt); DBG("%s: alloc obj %p level %d %dx%dx%d using object's miptree %p\n", - __FUNCTION__, texobj, image->Level, + __func__, texobj, image->Level, image->Width, image->Height, image->Depth, intel_texobj->mt); } else { intel_image->mt = intel_miptree_create_for_teximage(brw, intel_texobj, @@ -103,7 +103,7 @@ intel_alloc_texture_image_buffer(struct gl_context *ctx, intel_miptree_reference(&intel_texobj->mt, intel_image->mt); DBG("%s: alloc obj %p level %d %dx%dx%d using new miptree %p\n", - __FUNCTION__, texobj, image->Level, + __func__, texobj, image->Level, image->Width, image->Height, image->Depth, intel_image->mt); } @@ -185,7 +185,7 @@ intel_free_texture_image_buffer(struct gl_context * ctx, { struct intel_texture_image *intelImage = intel_texture_image(texImage); - DBG("%s\n", __FUNCTION__); + DBG("%s\n", __func__); intel_miptree_release(&intelImage->mt); diff --git a/src/mesa/drivers/dri/i965/intel_tex_copy.c b/src/mesa/drivers/dri/i965/intel_tex_copy.c index fc3103174d5..4d8c82e0569 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_copy.c +++ b/src/mesa/drivers/dri/i965/intel_tex_copy.c @@ -71,7 +71,7 @@ intel_copy_texsubimage(struct brw_context *brw, if (!intelImage->mt || !irb || !irb->mt) { if (unlikely(INTEL_DEBUG & DEBUG_PERF)) fprintf(stderr, "%s fail %p %p (0x%08x)\n", - __FUNCTION__, intelImage->mt, irb, internalFormat); + __func__, intelImage->mt, irb, internalFormat); return false; } @@ -121,7 +121,7 @@ intelCopyTexSubImage(struct gl_context *ctx, GLuint dims, } /* Finally, fall back to meta. This will likely be slow. */ - perf_debug("%s - fallback to swrast\n", __FUNCTION__); + perf_debug("%s - fallback to swrast\n", __func__); _mesa_meta_CopyTexSubImage(ctx, dims, texImage, xoffset, yoffset, slice, rb, x, y, width, height); diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index b70f8de6430..7952ee5ad88 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_image.c +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c @@ -45,7 +45,7 @@ intel_miptree_create_for_teximage(struct brw_context *brw, intel_miptree_get_dimensions_for_image(&intelImage->base.Base, &width, &height, &depth); - DBG("%s\n", __FUNCTION__); + DBG("%s\n", __func__); /* Figure out image dimensions at start level. */ for (i = intelImage->base.Base.Level; i > 0; i--) { @@ -98,7 +98,7 @@ intelTexImage(struct gl_context * ctx, bool tex_busy = intelImage->mt && drm_intel_bo_busy(intelImage->mt->bo); DBG("%s mesa_format %s target %s format %s type %s level %d %dx%dx%d\n", - __FUNCTION__, _mesa_get_format_name(texImage->TexFormat), + __func__, _mesa_get_format_name(texImage->TexFormat), _mesa_lookup_enum_by_nr(texImage->TexObject->Target), _mesa_lookup_enum_by_nr(format), _mesa_lookup_enum_by_nr(type), texImage->Level, texImage->Width, texImage->Height, texImage->Depth); @@ -131,7 +131,7 @@ intelTexImage(struct gl_context * ctx, return; DBG("%s: upload image %dx%dx%d pixels %p\n", - __FUNCTION__, texImage->Width, texImage->Height, texImage->Depth, + __func__, texImage->Width, texImage->Height, texImage->Depth, pixels); _mesa_store_teximage(ctx, dims, texImage, @@ -438,7 +438,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx, error = brw_bo_map(brw, bo, false /* write enable */, "miptree"); if (error) { - DBG("%s: failed to map bo\n", __FUNCTION__); + DBG("%s: failed to map bo\n", __func__); return false; } @@ -447,7 +447,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx, DBG("%s: level=%d x,y=(%d,%d) (w,h)=(%d,%d) format=0x%x type=0x%x " "mesa_format=0x%x tiling=%d " "packing=(alignment=%d row_length=%d skip_pixels=%d skip_rows=%d)\n", - __FUNCTION__, texImage->Level, xoffset, yoffset, width, height, + __func__, texImage->Level, xoffset, yoffset, width, height, format, type, texImage->TexFormat, image->mt->tiling, packing->Alignment, packing->RowLength, packing->SkipPixels, packing->SkipRows); @@ -480,7 +480,7 @@ intel_get_tex_image(struct gl_context *ctx, struct brw_context *brw = brw_context(ctx); bool ok; - DBG("%s\n", __FUNCTION__); + DBG("%s\n", __func__); if (_mesa_is_bufferobj(ctx->Pack.BufferObj)) { if (_mesa_meta_pbo_GetTexSubImage(ctx, 3, texImage, 0, 0, 0, @@ -489,7 +489,7 @@ intel_get_tex_image(struct gl_context *ctx, pixels, &ctx->Pack)) return; - perf_debug("%s: fallback to CPU mapping in PBO case\n", __FUNCTION__); + perf_debug("%s: fallback to CPU mapping in PBO case\n", __func__); } ok = intel_gettexsubimage_tiled_memcpy(ctx, texImage, 0, 0, @@ -501,7 +501,7 @@ intel_get_tex_image(struct gl_context *ctx, _mesa_meta_GetTexImage(ctx, format, type, pixels, texImage); - DBG("%s - DONE\n", __FUNCTION__); + DBG("%s - DONE\n", __func__); } void diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c index 909ff25d825..7507f7669a0 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c +++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c @@ -150,7 +150,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx, error = brw_bo_map(brw, bo, true /* write enable */, "miptree"); if (error || bo->virtual == NULL) { - DBG("%s: failed to map bo\n", __FUNCTION__); + DBG("%s: failed to map bo\n", __func__); return false; } @@ -163,7 +163,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx, "mesa_format=0x%x tiling=%d " "packing=(alignment=%d row_length=%d skip_pixels=%d skip_rows=%d) " "for_glTexImage=%d\n", - __FUNCTION__, texImage->Level, xoffset, yoffset, width, height, + __func__, texImage->Level, xoffset, yoffset, width, height, format, type, texImage->TexFormat, image->mt->tiling, packing->Alignment, packing->RowLength, packing->SkipPixels, packing->SkipRows, for_glTexImage); @@ -205,7 +205,7 @@ intelTexSubImage(struct gl_context * ctx, bool tex_busy = intelImage->mt && drm_intel_bo_busy(intelImage->mt->bo); DBG("%s mesa_format %s target %s format %s type %s level %d %dx%dx%d\n", - __FUNCTION__, _mesa_get_format_name(texImage->TexFormat), + __func__, _mesa_get_format_name(texImage->TexFormat), _mesa_lookup_enum_by_nr(texImage->TexObject->Target), _mesa_lookup_enum_by_nr(format), _mesa_lookup_enum_by_nr(type), texImage->Level, texImage->Width, texImage->Height, texImage->Depth); diff --git a/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp b/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp index 0c271629c0e..17bece5478f 100644 --- a/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp +++ b/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp @@ -29,7 +29,7 @@ using namespace brw; int ret = 0; -#define register_coalesce(v) _register_coalesce(v, __FUNCTION__) +#define register_coalesce(v) _register_coalesce(v, __func__) class register_coalesce_test : public ::testing::Test { virtual void SetUp(); |