diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.c | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_draw.c | 4 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 10 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 |
4 files changed, 8 insertions, 16 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index 56700d761f4..76f2ae6858c 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -1269,7 +1269,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb, enum isl_aux_usage aux_usage = intel_miptree_render_aux_usage(brw, irb->mt, isl_format, false); intel_miptree_prepare_render(brw, irb->mt, level, irb->mt_layer, - num_layers, isl_format, false); + num_layers, aux_usage); struct isl_surf isl_tmp[2]; struct blorp_surf surf; @@ -1288,7 +1288,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb, blorp_batch_finish(&batch); intel_miptree_finish_render(brw, irb->mt, level, irb->mt_layer, - num_layers, isl_format, false); + num_layers, aux_usage); } return; diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index c94fc55e57c..125e64b3c02 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -553,7 +553,7 @@ brw_predraw_resolve_framebuffer(struct brw_context *brw) intel_miptree_prepare_render(brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count, - isl_format, blend_enabled); + aux_usage); brw_cache_flush_for_render(brw, irb->mt->bo, isl_format, aux_usage); @@ -631,7 +631,7 @@ brw_postdraw_set_buffers_need_resolve(struct brw_context *brw) intel_miptree_finish_render(brw, irb->mt, irb->mt_level, irb->mt_layer, irb->layer_count, - isl_format, blend_enabled); + aux_usage); } } diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index e129d5eb9fb..38287c4528c 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -2724,11 +2724,8 @@ void intel_miptree_prepare_render(struct brw_context *brw, struct intel_mipmap_tree *mt, uint32_t level, uint32_t start_layer, uint32_t layer_count, - enum isl_format render_format, - bool blend_enabled) + enum isl_aux_usage aux_usage) { - enum isl_aux_usage aux_usage = - intel_miptree_render_aux_usage(brw, mt, render_format, blend_enabled); intel_miptree_prepare_access(brw, mt, level, 1, start_layer, layer_count, aux_usage, aux_usage != ISL_AUX_USAGE_NONE); } @@ -2737,13 +2734,10 @@ void intel_miptree_finish_render(struct brw_context *brw, struct intel_mipmap_tree *mt, uint32_t level, uint32_t start_layer, uint32_t layer_count, - enum isl_format render_format, - bool blend_enabled) + enum isl_aux_usage aux_usage) { assert(_mesa_is_format_color_format(mt->format)); - enum isl_aux_usage aux_usage = - intel_miptree_render_aux_usage(brw, mt, render_format, blend_enabled); intel_miptree_finish_write(brw, mt, level, start_layer, layer_count, aux_usage); } diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index c3f1bfea5b5..17dcdbca38c 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -657,14 +657,12 @@ void intel_miptree_prepare_render(struct brw_context *brw, struct intel_mipmap_tree *mt, uint32_t level, uint32_t start_layer, uint32_t layer_count, - enum isl_format render_format, - bool blend_enabled); + enum isl_aux_usage aux_usage); void intel_miptree_finish_render(struct brw_context *brw, struct intel_mipmap_tree *mt, uint32_t level, uint32_t start_layer, uint32_t layer_count, - enum isl_format render_format, - bool blend_enabled); + enum isl_aux_usage aux_usage); void intel_miptree_prepare_depth(struct brw_context *brw, struct intel_mipmap_tree *mt, uint32_t level, |