diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp index e20d3ccb8a4..c2010c036c9 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp @@ -1211,7 +1211,20 @@ brw_reg_from_fs_reg(fs_reg *reg) case MRF: if (reg->stride == 0) { brw_reg = brw_vec1_reg(brw_file_from_reg(reg), reg->reg, 0); + } else if (reg->width < 8) { + brw_reg = brw_vec8_reg(brw_file_from_reg(reg), reg->reg, 0); + brw_reg = stride(brw_reg, reg->width * reg->stride, + reg->width, reg->stride); } else { + /* From the Haswell PRM: + * + * VertStride must be used to cross GRF register boundaries. This + * rule implies that elements within a 'Width' cannot cross GRF + * boundaries. + * + * So, for registers with width > 8, we have to use a width of 8 + * and trust the compression state to sort out the exec size. + */ brw_reg = brw_vec8_reg(brw_file_from_reg(reg), reg->reg, 0); brw_reg = stride(brw_reg, 8 * reg->stride, 8, reg->stride); } |