diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_fs.cpp | 6 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_cs_state.c | 6 |
2 files changed, 10 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 8c0ec4ed27f..f1a1c87be5a 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -5995,6 +5995,12 @@ fs_visitor::allocate_registers(bool allow_spilling) * and platform. */ prog_data->total_scratch = MAX2(prog_data->total_scratch, 2048); + } else if (devinfo->gen <= 7 && stage == MESA_SHADER_COMPUTE) { + /* According to the MEDIAVFE_STATE's "Per Thread Scratch Space" + * field documentation, platforms prior to Haswell measure scratch + * size linearly with a range of [1kB, 12kB] and 1kB granularity. + */ + prog_data->total_scratch = ALIGN(last_scratch, 1024); } } } diff --git a/src/mesa/drivers/dri/i965/gen7_cs_state.c b/src/mesa/drivers/dri/i965/gen7_cs_state.c index 42cd61fefef..9d83837812a 100644 --- a/src/mesa/drivers/dri/i965/gen7_cs_state.c +++ b/src/mesa/drivers/dri/i965/gen7_cs_state.c @@ -79,10 +79,12 @@ brw_upload_cs_state(struct brw_context *brw) I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, ffs(prog_data->total_scratch) - 12); } else { - /* This is wrong but we'll fix it later */ + /* Earlier platforms use the range [0, 11] to mean [1kB, 12kB] + * where 0 = 1kB, 1 = 2kB, 2 = 3kB, ..., 11 = 12kB. + */ OUT_RELOC(stage_state->scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - ffs(prog_data->total_scratch) - 11); + prog_data->total_scratch / 1024 - 1); } } else { OUT_BATCH(0); |