diff options
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index ddc0c6d105e..d6ab2861478 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -621,6 +621,18 @@ emit_find_msb_using_lzd(const fs_builder &bld, inst->src[0].negate = true; } +static brw_rnd_mode +brw_rnd_mode_from_nir_op (const nir_op op) { + switch (op) { + case nir_op_f2f16_rtz: + return BRW_RND_MODE_RTZ; + case nir_op_f2f16_rtne: + return BRW_RND_MODE_RTNE; + default: + unreachable("Operation doesn't support rounding mode"); + } +} + void fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr) { @@ -724,6 +736,12 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr) inst->saturate = instr->dest.saturate; break; + case nir_op_f2f16_rtne: + case nir_op_f2f16_rtz: + bld.emit(SHADER_OPCODE_RND_MODE, bld.null_reg_ud(), + brw_imm_d(brw_rnd_mode_from_nir_op(instr->op))); + /* fallthrough */ + /* In theory, it would be better to use BRW_OPCODE_F32TO16. Depending * on the HW gen, it is a special hw opcode or just a MOV, and * brw_F32TO16 (at brw_eu_emit) would do the work to chose. |