diff options
| -rw-r--r-- | src/intel/vulkan/anv_blorp.c | 38 | ||||
| -rw-r--r-- | src/intel/vulkan/anv_private.h | 9 | ||||
| -rw-r--r-- | src/intel/vulkan/genX_cmd_buffer.c | 13 |
3 files changed, 34 insertions, 26 deletions
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index 229d87ea1ee..ccb9d1883ea 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -1570,26 +1570,30 @@ anv_image_copy_to_shadow(struct anv_cmd_buffer *cmd_buffer, blorp_batch_finish(&batch); } -void -anv_gen8_hiz_op_resolve(struct anv_cmd_buffer *cmd_buffer, - const struct anv_image *image, - enum blorp_hiz_op op) +static enum blorp_hiz_op +isl_to_blorp_hiz_op(enum isl_aux_op isl_op) { - assert(image); + switch (isl_op) { + case ISL_AUX_OP_FAST_CLEAR: return BLORP_HIZ_OP_DEPTH_CLEAR; + case ISL_AUX_OP_FULL_RESOLVE: return BLORP_HIZ_OP_DEPTH_RESOLVE; + case ISL_AUX_OP_AMBIGUATE: return BLORP_HIZ_OP_HIZ_RESOLVE; + default: + unreachable("Unsupported HiZ aux op"); + } +} +void +anv_image_hiz_op(struct anv_cmd_buffer *cmd_buffer, + const struct anv_image *image, + VkImageAspectFlagBits aspect, uint32_t level, + uint32_t base_layer, uint32_t layer_count, + enum isl_aux_op hiz_op) +{ + assert(aspect == VK_IMAGE_ASPECT_DEPTH_BIT); + assert(base_layer + layer_count <= anv_image_aux_layers(image, aspect, level)); assert(anv_image_aspect_to_plane(image->aspects, VK_IMAGE_ASPECT_DEPTH_BIT) == 0); - /* Don't resolve depth buffers without an auxiliary HiZ buffer and - * don't perform such a resolve on gens that don't support it. - */ - if (cmd_buffer->device->info.gen < 8 || - image->planes[0].aux_usage != ISL_AUX_USAGE_HIZ) - return; - - assert(op == BLORP_HIZ_OP_HIZ_RESOLVE || - op == BLORP_HIZ_OP_DEPTH_RESOLVE); - struct blorp_batch batch; blorp_batch_init(&cmd_buffer->device->blorp, &batch, cmd_buffer, 0); @@ -1599,7 +1603,9 @@ anv_gen8_hiz_op_resolve(struct anv_cmd_buffer *cmd_buffer, ISL_AUX_USAGE_HIZ, &surf); surf.clear_color.f32[0] = ANV_HZ_FC_VAL; - blorp_hiz_op(&batch, &surf, 0, 0, 1, op); + blorp_hiz_op(&batch, &surf, level, base_layer, layer_count, + isl_to_blorp_hiz_op(hiz_op)); + blorp_batch_finish(&batch); } diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h index ac8a468bf7d..c3ab9ebb09f 100644 --- a/src/intel/vulkan/anv_private.h +++ b/src/intel/vulkan/anv_private.h @@ -2582,10 +2582,11 @@ anv_can_sample_with_hiz(const struct gen_device_info * const devinfo, } void -anv_gen8_hiz_op_resolve(struct anv_cmd_buffer *cmd_buffer, - const struct anv_image *image, - enum blorp_hiz_op op); - +anv_image_hiz_op(struct anv_cmd_buffer *cmd_buffer, + const struct anv_image *image, + VkImageAspectFlagBits aspect, uint32_t level, + uint32_t base_layer, uint32_t layer_count, + enum isl_aux_op hiz_op); void anv_image_mcs_op(struct anv_cmd_buffer *cmd_buffer, const struct anv_image *image, diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 5f8caf2a03c..3fdfc310703 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -388,19 +388,20 @@ transition_depth_buffer(struct anv_cmd_buffer *cmd_buffer, anv_layout_to_aux_usage(&cmd_buffer->device->info, image, VK_IMAGE_ASPECT_DEPTH_BIT, final_layout); - enum blorp_hiz_op hiz_op; + enum isl_aux_op hiz_op; if (hiz_enabled && !enable_hiz) { - hiz_op = BLORP_HIZ_OP_DEPTH_RESOLVE; + hiz_op = ISL_AUX_OP_FULL_RESOLVE; } else if (!hiz_enabled && enable_hiz) { - hiz_op = BLORP_HIZ_OP_HIZ_RESOLVE; + hiz_op = ISL_AUX_OP_AMBIGUATE; } else { assert(hiz_enabled == enable_hiz); /* If the same buffer will be used, no resolves are necessary. */ - hiz_op = BLORP_HIZ_OP_NONE; + hiz_op = ISL_AUX_OP_NONE; } - if (hiz_op != BLORP_HIZ_OP_NONE) - anv_gen8_hiz_op_resolve(cmd_buffer, image, hiz_op); + if (hiz_op != ISL_AUX_OP_NONE) + anv_image_hiz_op(cmd_buffer, image, VK_IMAGE_ASPECT_DEPTH_BIT, + 0, 0, 1, hiz_op); } #define MI_PREDICATE_SRC0 0x2400 |