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-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 9631f18ff7f..cb9bbd20805 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -195,7 +195,11 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
*/
*num_patches = MIN2(*num_patches, 40);
- if (sctx->b.chip_class == SI) {
+ if (sctx->b.chip_class == SI ||
+ /* TODO: fix GFX9 where a threadgroup contains more than 1 wave and
+ * LS vertices per patch > HS vertices per patch. Piglit: 16in-1out */
+ (sctx->b.chip_class == GFX9 &&
+ num_tcs_input_cp > num_tcs_output_cp)) {
/* SI bug workaround, related to power management. Limit LS-HS
* threadgroups to only one wave.
*/