diff options
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 152 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.h | 7 |
2 files changed, 2 insertions, 157 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index f71d87fc468..81a43410ec6 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -55,155 +55,6 @@ void si_init_atom(struct si_context *sctx, struct r600_atom *atom, *list_elem = atom; } -unsigned si_array_mode(unsigned mode) -{ - switch (mode) { - default: - case RADEON_SURF_MODE_LINEAR_ALIGNED: - return V_009910_ARRAY_LINEAR_ALIGNED; - case RADEON_SURF_MODE_1D: - return V_009910_ARRAY_1D_TILED_THIN1; - case RADEON_SURF_MODE_2D: - return V_009910_ARRAY_2D_TILED_THIN1; - } -} - -uint32_t si_num_banks(struct si_screen *sscreen, struct r600_texture *tex) -{ - if (sscreen->b.chip_class >= CIK && - sscreen->b.info.cik_macrotile_mode_array_valid) { - unsigned index, tileb; - - tileb = 8 * 8 * tex->surface.bpe; - tileb = MIN2(tex->surface.tile_split, tileb); - - for (index = 0; tileb > 64; index++) { - tileb >>= 1; - } - assert(index < 16); - - return (sscreen->b.info.cik_macrotile_mode_array[index] >> 6) & 0x3; - } - - if (sscreen->b.chip_class == SI && - sscreen->b.info.si_tile_mode_array_valid) { - /* Don't use stencil_tiling_index, because num_banks is always - * read from the depth mode. */ - unsigned tile_mode_index = tex->surface.tiling_index[0]; - assert(tile_mode_index < 32); - - return G_009910_NUM_BANKS(sscreen->b.info.si_tile_mode_array[tile_mode_index]); - } - - /* The old way. */ - switch (sscreen->b.info.r600_num_banks) { - case 2: - return V_02803C_ADDR_SURF_2_BANK; - case 4: - return V_02803C_ADDR_SURF_4_BANK; - case 8: - default: - return V_02803C_ADDR_SURF_8_BANK; - case 16: - return V_02803C_ADDR_SURF_16_BANK; - } -} - -unsigned cik_tile_split(unsigned tile_split) -{ - switch (tile_split) { - case 64: - tile_split = V_028040_ADDR_SURF_TILE_SPLIT_64B; - break; - case 128: - tile_split = V_028040_ADDR_SURF_TILE_SPLIT_128B; - break; - case 256: - tile_split = V_028040_ADDR_SURF_TILE_SPLIT_256B; - break; - case 512: - tile_split = V_028040_ADDR_SURF_TILE_SPLIT_512B; - break; - default: - case 1024: - tile_split = V_028040_ADDR_SURF_TILE_SPLIT_1KB; - break; - case 2048: - tile_split = V_028040_ADDR_SURF_TILE_SPLIT_2KB; - break; - case 4096: - tile_split = V_028040_ADDR_SURF_TILE_SPLIT_4KB; - break; - } - return tile_split; -} - -unsigned cik_macro_tile_aspect(unsigned macro_tile_aspect) -{ - switch (macro_tile_aspect) { - default: - case 1: - macro_tile_aspect = V_02803C_ADDR_SURF_MACRO_ASPECT_1; - break; - case 2: - macro_tile_aspect = V_02803C_ADDR_SURF_MACRO_ASPECT_2; - break; - case 4: - macro_tile_aspect = V_02803C_ADDR_SURF_MACRO_ASPECT_4; - break; - case 8: - macro_tile_aspect = V_02803C_ADDR_SURF_MACRO_ASPECT_8; - break; - } - return macro_tile_aspect; -} - -unsigned cik_bank_wh(unsigned bankwh) -{ - switch (bankwh) { - default: - case 1: - bankwh = V_02803C_ADDR_SURF_BANK_WIDTH_1; - break; - case 2: - bankwh = V_02803C_ADDR_SURF_BANK_WIDTH_2; - break; - case 4: - bankwh = V_02803C_ADDR_SURF_BANK_WIDTH_4; - break; - case 8: - bankwh = V_02803C_ADDR_SURF_BANK_WIDTH_8; - break; - } - return bankwh; -} - -unsigned cik_db_pipe_config(struct si_screen *sscreen, unsigned tile_mode) -{ - if (sscreen->b.info.si_tile_mode_array_valid) { - uint32_t gb_tile_mode = sscreen->b.info.si_tile_mode_array[tile_mode]; - - return G_009910_PIPE_CONFIG(gb_tile_mode); - } - - /* This is probably broken for a lot of chips, but it's only used - * if the kernel cannot return the tile mode array for CIK. */ - switch (sscreen->b.info.num_tile_pipes) { - case 16: - return V_02803C_X_ADDR_SURF_P16_32X32_16X16; - case 8: - return V_02803C_X_ADDR_SURF_P8_32X32_16X16; - case 4: - default: - if (sscreen->b.info.num_render_backends == 4) - return V_02803C_X_ADDR_SURF_P4_16X16; - else - return V_02803C_X_ADDR_SURF_P4_8X16; - case 2: - return V_02803C_ADDR_SURF_P2; - } -} - static unsigned si_map_swizzle(unsigned swizzle) { switch (swizzle) { @@ -1972,7 +1823,8 @@ boolean si_is_format_supported(struct pipe_screen *screen, return retval == usage; } -unsigned si_tile_mode_index(struct r600_texture *rtex, unsigned level, bool stencil) +static unsigned si_tile_mode_index(struct r600_texture *rtex, unsigned level, + bool stencil) { unsigned tile_mode_index = 0; diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index ed3a1fe18ad..f2a3b037a2c 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -282,13 +282,6 @@ boolean si_is_format_supported(struct pipe_screen *screen, unsigned usage); void si_init_state_functions(struct si_context *sctx); void si_init_screen_state_functions(struct si_screen *sscreen); -unsigned cik_bank_wh(unsigned bankwh); -unsigned cik_db_pipe_config(struct si_screen *sscreen, unsigned tile_mode); -unsigned cik_macro_tile_aspect(unsigned macro_tile_aspect); -unsigned cik_tile_split(unsigned tile_split); -unsigned si_array_mode(unsigned mode); -uint32_t si_num_banks(struct si_screen *sscreen, struct r600_texture *tex); -unsigned si_tile_mode_index(struct r600_texture *rtex, unsigned level, bool stencil); void si_make_buffer_descriptor(struct si_screen *screen, struct r600_resource *buf, enum pipe_format format, |