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-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_surface.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
index 08989b5cf53..abe2b2a67af 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
@@ -111,7 +111,7 @@ ADDR_HANDLE amdgpu_addr_create(struct amdgpu_winsys *ws)
regValue.gbAddrConfig = ws->amdinfo.gb_addr_cfg;
regValue.noOfRanks = (ws->amdinfo.mc_arb_ramcfg & 0x4) >> 2;
- regValue.backendDisables = ws->amdinfo.backend_disable[0];
+ regValue.backendDisables = ws->amdinfo.enabled_rb_pipes_mask;
regValue.pTileConfig = ws->amdinfo.gb_tile_mode;
regValue.noOfEntries = ARRAY_SIZE(ws->amdinfo.gb_tile_mode);
if (ws->info.chip_class == SI) {