diff options
| -rw-r--r-- | src/intel/compiler/brw_fs.h | 6 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 16 |
2 files changed, 22 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h index 8ccd1659075..d56e33715ee 100644 --- a/src/intel/compiler/brw_fs.h +++ b/src/intel/compiler/brw_fs.h @@ -540,6 +540,12 @@ fs_reg shuffle_for_32bit_write(const brw::fs_builder &bld, fs_reg setup_imm_df(const brw::fs_builder &bld, double v); +fs_reg setup_imm_b(const brw::fs_builder &bld, + int8_t v); + +fs_reg setup_imm_ub(const brw::fs_builder &bld, + uint8_t v); + enum brw_barycentric_mode brw_barycentric_mode(enum glsl_interp_mode mode, nir_intrinsic_op op); diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index a41dc2a47b8..2c8595b9730 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -5396,3 +5396,19 @@ setup_imm_df(const fs_builder &bld, double v) return component(retype(tmp, BRW_REGISTER_TYPE_DF), 0); } + +fs_reg +setup_imm_b(const fs_builder &bld, int8_t v) +{ + const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_B); + bld.MOV(tmp, brw_imm_w(v)); + return tmp; +} + +fs_reg +setup_imm_ub(const fs_builder &bld, uint8_t v) +{ + const fs_reg tmp = bld.vgrf(BRW_REGISTER_TYPE_UB); + bld.MOV(tmp, brw_imm_uw(v)); + return tmp; +} |