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-rw-r--r--src/broadcom/cle/meson.build3
-rw-r--r--src/intel/genxml/meson.build3
-rw-r--r--src/intel/isl/meson.build6
-rw-r--r--src/intel/vulkan/meson.build6
-rw-r--r--src/mesa/drivers/dri/i965/meson.build3
5 files changed, 7 insertions, 14 deletions
diff --git a/src/broadcom/cle/meson.build b/src/broadcom/cle/meson.build
index 32510cee5ef..1534fc9d82b 100644
--- a/src/broadcom/cle/meson.build
+++ b/src/broadcom/cle/meson.build
@@ -39,14 +39,13 @@ v3d_xml_h = custom_target(
v3d_xml_pack = []
foreach f : v3d_xml_files
_name = '@0@_pack.h'.format(f.split('.')[0])
- _xml = custom_target(
+ v3d_xml_pack += custom_target(
_name,
input : ['gen_pack_header.py', f],
output : _name,
command : [prog_python2, '@INPUT@'],
capture : true,
)
- v3d_xml_pack += _xml
endforeach
libbroadcom_cle = static_library(
diff --git a/src/intel/genxml/meson.build b/src/intel/genxml/meson.build
index 30c0d8bf2f6..371f85307c8 100644
--- a/src/intel/genxml/meson.build
+++ b/src/intel/genxml/meson.build
@@ -48,12 +48,11 @@ genX_bits_h = custom_target(
gen_xml_pack = []
foreach f : gen_xml_files
_name = '@0@_pack.h'.format(f.split('.')[0])
- _xml = custom_target(
+ gen_xml_pack += custom_target(
_name,
input : ['gen_pack_header.py', f],
output : _name,
command : [prog_python2, '@INPUT@'],
capture : true,
)
- gen_xml_pack += _xml
endforeach
diff --git a/src/intel/isl/meson.build b/src/intel/isl/meson.build
index 116750d86d6..0838c32af32 100644
--- a/src/intel/isl/meson.build
+++ b/src/intel/isl/meson.build
@@ -53,15 +53,13 @@ foreach g : [['40', isl_gen4_files], ['50', []], ['60', isl_gen6_files],
['70', isl_gen7_files], ['75', []], ['80', isl_gen8_files],
['90', isl_gen9_files], ['100', []]]
_gen = g[0]
- _sources = g[1]
- _lib = static_library(
+ isl_gen_libs += static_library(
'libisl_gen@0@'.format(_gen),
- [_sources, isl_gen_files, gen_xml_pack],
+ [g[1], isl_gen_files, gen_xml_pack],
include_directories : [inc_common, inc_intel],
c_args : [c_vis_args, no_override_init_args,
'-DGEN_VERSIONx10=@0@'.format(_gen)],
)
- isl_gen_libs += _lib
endforeach
isl_format_layout_c = custom_target(
diff --git a/src/intel/vulkan/meson.build b/src/intel/vulkan/meson.build
index 66266a0e95a..4cd7a025813 100644
--- a/src/intel/vulkan/meson.build
+++ b/src/intel/vulkan/meson.build
@@ -89,10 +89,9 @@ foreach g : [['70', ['gen7_cmd_buffer.c']], ['75', ['gen7_cmd_buffer.c']],
['80', ['gen8_cmd_buffer.c']], ['90', ['gen8_cmd_buffer.c']],
['100', ['gen8_cmd_buffer.c']]]
_gen = g[0]
- _files = g[1]
- _lib = static_library(
+ libanv_gen_libs += static_library(
'libanv_gen@0@'.format(_gen),
- [anv_gen_files, _files, block_entrypoints],
+ [anv_gen_files, g[1], block_entrypoints],
include_directories : [
inc_common, inc_compiler, inc_drm_uapi, inc_intel, inc_vulkan_util,
inc_vulkan_wsi,
@@ -103,7 +102,6 @@ foreach g : [['70', ['gen7_cmd_buffer.c']], ['75', ['gen7_cmd_buffer.c']],
],
dependencies : [dep_libdrm, dep_valgrind],
)
- libanv_gen_libs += _lib
endforeach
libanv_files = files(
diff --git a/src/mesa/drivers/dri/i965/meson.build b/src/mesa/drivers/dri/i965/meson.build
index e3bf9cc51bb..1183978b7b3 100644
--- a/src/mesa/drivers/dri/i965/meson.build
+++ b/src/mesa/drivers/dri/i965/meson.build
@@ -136,7 +136,7 @@ files_i965 = files(
i965_gen_libs = []
foreach v : ['40', '45', '50', '60', '70', '75', '80', '90', '100']
- _lib = static_library(
+ i965_gen_libs += static_library(
'libi965_gen@0@'.format(v),
['genX_blorp_exec.c', 'genX_state_upload.c', nir_opcodes_h, gen_xml_pack],
include_directories : [inc_common, inc_intel, inc_dri_common],
@@ -146,7 +146,6 @@ foreach v : ['40', '45', '50', '60', '70', '75', '80', '90', '100']
],
dependencies : [dep_libdrm],
)
- i965_gen_libs += _lib
endforeach
oa_generator = generator(