diff options
4 files changed, 19 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp index 6530078b938..dc1ab769b98 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp @@ -540,6 +540,12 @@ NVC0LegalizePostRA::visit(BasicBlock *bb) // It seems like barriers are never required for tessellation since // the warp size is 32, and there are always at most 32 tcs threads. bb->remove(i); + } else + if (i->op == OP_LOAD && i->subOp == NV50_IR_SUBOP_LDC_IS) { + int offset = i->src(0).get()->reg.data.offset; + if (abs(offset) > 0x10000) + i->src(0).get()->reg.fileIndex += offset >> 16; + i->src(0).get()->reg.data.offset = (int)(short)offset; } else { // TODO: Move this to before register allocation for operations that // need the $c register ! diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h index 673f8811ff3..e6e1912adae 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h @@ -192,7 +192,7 @@ public: virtual bool insnCanLoad(const Instruction *insn, int s, const Instruction *ld) const = 0; virtual bool insnCanLoadOffset(const Instruction *insn, int s, - int offset) const { return true; } + int offset) const = 0; virtual bool isOpSupported(operation, DataType) const = 0; virtual bool isAccessSupported(DataFile, DataType) const = 0; virtual bool isModSupported(const Instruction *, diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp index 014c652eede..a03afa8dc8d 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp @@ -384,6 +384,16 @@ TargetNVC0::insnCanLoad(const Instruction *i, int s, } bool +TargetNVC0::insnCanLoadOffset(const Instruction *insn, int s, int offset) const +{ + const ValueRef& ref = insn->src(s); + if (ref.getFile() == FILE_MEMORY_CONST && + (insn->op != OP_LOAD || insn->subOp != NV50_IR_SUBOP_LDC_IS)) + return offset >= -0x8000 && offset < 0x8000; + return true; +} + +bool TargetNVC0::isAccessSupported(DataFile file, DataType ty) const { if (ty == TYPE_NONE) diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.h index 3c5c7480405..7d11cd96315 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.h +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.h @@ -48,6 +48,8 @@ public: virtual bool insnCanLoad(const Instruction *insn, int s, const Instruction *ld) const; + virtual bool insnCanLoadOffset(const Instruction *insn, int s, + int offset) const; virtual bool isOpSupported(operation, DataType) const; virtual bool isAccessSupported(DataFile, DataType) const; virtual bool isModSupported(const Instruction *, int s, Modifier) const; |