diff options
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 25 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.h | 3 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 5 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_texture.c | 31 |
4 files changed, 59 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 1ca38ed55cb..d5ca34474f0 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -1072,6 +1072,31 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws, if (debug_get_bool_option("RADEON_DUMP_SHADERS", false)) sscreen->debug_flags |= DBG_ALL_SHADERS; + /* Syntax: + * EQAA=s,z,c + * Example: + * EQAA=8,4,2 + + * That means 8 coverage samples, 4 Z/S samples, and 2 color samples. + * Constraints: + * s >= z >= c (ignoring this only wastes memory) + * s = [2..16] + * z = [2..8] + * c = [2..8] + * + * Only MSAA color and depth buffers are overriden. + */ + if (sscreen->info.drm_major == 3) { + const char *eqaa = debug_get_option("EQAA", NULL); + unsigned s,z,f; + + if (eqaa && sscanf(eqaa, "%u,%u,%u", &s, &z, &f) == 3 && s && z && f) { + sscreen->eqaa_force_coverage_samples = s; + sscreen->eqaa_force_z_samples = z; + sscreen->eqaa_force_color_samples = f; + } + } + for (i = 0; i < num_comp_hi_threads; i++) si_init_compiler(sscreen, &sscreen->compiler[i]); for (i = 0; i < num_comp_lo_threads; i++) diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 55a135f3870..6917d5e6068 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -416,6 +416,9 @@ struct si_screen { unsigned tess_offchip_ring_size; unsigned tess_factor_ring_size; unsigned vgt_hs_offchip_param; + unsigned eqaa_force_coverage_samples; + unsigned eqaa_force_z_samples; + unsigned eqaa_force_color_samples; bool has_clear_state; bool has_distributed_tess; bool has_draw_indirect_multi; diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index e133bf28589..c7585b285e9 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -2119,6 +2119,7 @@ static boolean si_is_format_supported(struct pipe_screen *screen, unsigned sample_count, unsigned usage) { + struct si_screen *sscreen = (struct si_screen *)screen; unsigned retval = 0; if (target >= PIPE_MAX_TEXTURE_TYPES) { @@ -2142,6 +2143,10 @@ static boolean si_is_format_supported(struct pipe_screen *screen, case 8: break; case 16: + /* Allow resource_copy_region with nr_samples == 16. */ + if (sscreen->eqaa_force_coverage_samples == 16 && + !util_format_is_depth_or_stencil(format)) + return true; if (format == PIPE_FORMAT_NONE) return true; else diff --git a/src/gallium/drivers/radeonsi/si_texture.c b/src/gallium/drivers/radeonsi/si_texture.c index 52b8b87732f..804708e0516 100644 --- a/src/gallium/drivers/radeonsi/si_texture.c +++ b/src/gallium/drivers/radeonsi/si_texture.c @@ -1387,9 +1387,14 @@ si_choose_tiling(struct si_screen *sscreen, return RADEON_SURF_MODE_2D; } -static unsigned si_get_num_color_samples(const struct pipe_resource *templ, +static unsigned si_get_num_color_samples(struct si_screen *sscreen, + const struct pipe_resource *templ, bool imported) { + if (!imported && templ->nr_samples >= 2 && + sscreen->eqaa_force_color_samples) + return sscreen->eqaa_force_color_samples; + return CLAMP(templ->nr_samples, 1, 8); } @@ -1397,6 +1402,22 @@ struct pipe_resource *si_texture_create(struct pipe_screen *screen, const struct pipe_resource *templ) { struct si_screen *sscreen = (struct si_screen*)screen; + bool is_zs = util_format_is_depth_or_stencil(templ->format); + + if (templ->nr_samples >= 2) { + /* This is hackish (overwriting the const pipe_resource template), + * but should be harmless and state trackers can also see + * the overriden number of samples in the created pipe_resource. + */ + if (is_zs && sscreen->eqaa_force_z_samples) { + ((struct pipe_resource*)templ)->nr_samples = + sscreen->eqaa_force_z_samples; + } else if (!is_zs && sscreen->eqaa_force_color_samples) { + ((struct pipe_resource*)templ)->nr_samples = + sscreen->eqaa_force_coverage_samples; + } + } + struct radeon_surf surface = {0}; bool is_flushed_depth = templ->flags & SI_RESOURCE_FLAG_FLUSHED_DEPTH; bool tc_compatible_htile = @@ -1412,8 +1433,8 @@ struct pipe_resource *si_texture_create(struct pipe_screen *screen, !(sscreen->debug_flags & DBG(NO_HYPERZ)) && !is_flushed_depth && templ->nr_samples <= 1 && /* TC-compat HTILE is less efficient with MSAA */ - util_format_is_depth_or_stencil(templ->format); - unsigned num_color_samples = si_get_num_color_samples(templ, false); + is_zs; + unsigned num_color_samples = si_get_num_color_samples(sscreen, templ, false); int r; r = si_init_surface(sscreen, &surface, templ, num_color_samples, @@ -1457,7 +1478,7 @@ static struct pipe_resource *si_texture_from_handle(struct pipe_screen *screen, si_surface_import_metadata(sscreen, &surface, &metadata, &array_mode, &is_scanout); - unsigned num_color_samples = si_get_num_color_samples(templ, true); + unsigned num_color_samples = si_get_num_color_samples(sscreen, templ, true); r = si_init_surface(sscreen, &surface, templ, num_color_samples, array_mode, stride, offset, true, is_scanout, @@ -2391,7 +2412,7 @@ si_texture_from_memobj(struct pipe_screen *screen, is_scanout = false; } - unsigned num_color_samples = si_get_num_color_samples(templ, true); + unsigned num_color_samples = si_get_num_color_samples(sscreen, templ, true); r = si_init_surface(sscreen, &surface, templ, num_color_samples, array_mode, memobj->stride, offset, true, |