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-rw-r--r--src/intel/isl/isl_gen6.c2
-rw-r--r--src/intel/isl/isl_gen7.c2
-rw-r--r--src/intel/isl/isl_storage_image.c4
-rw-r--r--src/intel/vulkan/anv_formats.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp4
5 files changed, 8 insertions, 8 deletions
diff --git a/src/intel/isl/isl_gen6.c b/src/intel/isl/isl_gen6.c
index 24c393925ed..699aa41d7ba 100644
--- a/src/intel/isl/isl_gen6.c
+++ b/src/intel/isl/isl_gen6.c
@@ -51,7 +51,7 @@ gen6_choose_msaa_layout(const struct isl_device *dev,
* - any compressed texture format (BC*)
* - any YCRCB* format
*/
- if (fmtl->bs > 8)
+ if (fmtl->bpb > 64)
return false;
if (isl_format_is_compressed(info->format))
return false;
diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c
index 542c137458f..d9b0c080a4c 100644
--- a/src/intel/isl/isl_gen7.c
+++ b/src/intel/isl/isl_gen7.c
@@ -51,7 +51,7 @@ gen7_choose_msaa_layout(const struct isl_device *dev,
* formats: any format with greater than 64 bits per element, any
* compressed texture format (BC*), and any YCRCB* format.
*/
- if (fmtl->bs > 8)
+ if (fmtl->bpb > 64)
return false;
if (isl_format_is_compressed(info->format))
return false;
diff --git a/src/intel/isl/isl_storage_image.c b/src/intel/isl/isl_storage_image.c
index 590d2e48b05..2617eb0eaff 100644
--- a/src/intel/isl/isl_storage_image.c
+++ b/src/intel/isl/isl_storage_image.c
@@ -194,9 +194,9 @@ isl_has_matching_typed_storage_image_format(const struct brw_device_info *devinf
if (devinfo->gen >= 9) {
return true;
} else if (devinfo->gen >= 8 || devinfo->is_haswell) {
- return isl_format_get_layout(fmt)->bs <= 8;
+ return isl_format_get_layout(fmt)->bpb <= 64;
} else {
- return isl_format_get_layout(fmt)->bs <= 4;
+ return isl_format_get_layout(fmt)->bpb <= 32;
}
}
diff --git a/src/intel/vulkan/anv_formats.c b/src/intel/vulkan/anv_formats.c
index 457e82003d6..b26e48a6c0b 100644
--- a/src/intel/vulkan/anv_formats.c
+++ b/src/intel/vulkan/anv_formats.c
@@ -271,7 +271,7 @@ anv_get_format(const struct brw_device_info *devinfo, VkFormat vk_format,
isl_format_get_layout(format.isl_format);
if (tiling == VK_IMAGE_TILING_OPTIMAL &&
- !util_is_power_of_two(isl_layout->bs)) {
+ !util_is_power_of_two(isl_layout->bpb)) {
/* Tiled formats *must* be power-of-two because we need up upload
* them with the render pipeline. For 3-channel formats, we fix
* this by switching them over to RGBX or RGBA formats under the
@@ -409,7 +409,7 @@ anv_physical_device_get_format_properties(struct anv_physical_device *physical_d
* what most clients will want.
*/
if (linear_fmt.isl_format != ISL_FORMAT_UNSUPPORTED &&
- !util_is_power_of_two(isl_format_layouts[linear_fmt.isl_format].bs) &&
+ !util_is_power_of_two(isl_format_layouts[linear_fmt.isl_format].bpb) &&
isl_format_rgb_to_rgbx(linear_fmt.isl_format) == ISL_FORMAT_UNSUPPORTED) {
tiled &= ~VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT &
~VK_FORMAT_FEATURE_BLIT_DST_BIT;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp b/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
index fc1fc139dde..a4774e6cac6 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
@@ -982,7 +982,7 @@ namespace brw {
/* Untyped surface reads return 32 bits of the surface per
* component, without any sort of unpacking or type conversion,
*/
- const unsigned size = isl_format_get_layout(format)->bs / 4;
+ const unsigned size = isl_format_get_layout(format)->bpb / 32;
/* they don't properly handle out of bounds access, so we have to
* check manually if the coordinates are valid and predicate the
* surface read on the result,
@@ -1130,7 +1130,7 @@ namespace brw {
/* Untyped surface writes store 32 bits of the surface per
* component, without any sort of packing or type conversion,
*/
- const unsigned size = isl_format_get_layout(format)->bs / 4;
+ const unsigned size = isl_format_get_layout(format)->bpb / 32;
/* they don't properly handle out of bounds access, so we have
* to check manually if the coordinates are valid and predicate