diff options
| -rw-r--r-- | src/intel/vulkan/anv_allocator.c | 2 | ||||
| -rw-r--r-- | src/intel/vulkan/gen8_cmd_buffer.c | 4 | ||||
| -rw-r--r-- | src/intel/vulkan/genX_cmd_buffer.c | 2 | ||||
| -rw-r--r-- | src/intel/vulkan/genX_pipeline.c | 4 |
4 files changed, 6 insertions, 6 deletions
diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vulkan/anv_allocator.c index efaaebcf39c..708b32b3452 100644 --- a/src/intel/vulkan/anv_allocator.c +++ b/src/intel/vulkan/anv_allocator.c @@ -1219,7 +1219,7 @@ anv_bo_cache_lookup_locked(struct anv_bo_cache *cache, uint32_t gem_handle) return bo; } -static struct anv_bo * +UNUSED static struct anv_bo * anv_bo_cache_lookup(struct anv_bo_cache *cache, uint32_t gem_handle) { pthread_mutex_lock(&cache->mutex); diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c index f253b23ee2b..064b8e930e9 100644 --- a/src/intel/vulkan/gen8_cmd_buffer.c +++ b/src/intel/vulkan/gen8_cmd_buffer.c @@ -167,7 +167,7 @@ genX(cmd_buffer_enable_pma_fix)(struct anv_cmd_buffer *cmd_buffer, bool enable) } } -static bool +UNUSED static bool want_depth_pma_fix(struct anv_cmd_buffer *cmd_buffer) { assert(GEN_GEN == 8); @@ -256,7 +256,7 @@ want_depth_pma_fix(struct anv_cmd_buffer *cmd_buffer) wm_prog_data->computed_depth_mode != PSCDEPTH_OFF; } -static bool +UNUSED static bool want_stencil_pma_fix(struct anv_cmd_buffer *cmd_buffer) { assert(GEN_GEN == 9); diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index c5735b27e02..db40b45c29a 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -629,7 +629,7 @@ transition_color_buffer(struct anv_cmd_buffer *cmd_buffer, /* Ensure the subresource range is valid. */ uint64_t last_level_num = base_level + level_count; const uint32_t max_depth = anv_minify(image->extent.depth, base_level); - const uint32_t image_layers = MAX2(image->array_size, max_depth); + UNUSED const uint32_t image_layers = MAX2(image->array_size, max_depth); assert((uint64_t)base_layer + layer_count <= image_layers); assert(last_level_num <= image->levels); /* The spec disallows these final layouts. */ diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c index c06d515a414..8065163dc46 100644 --- a/src/intel/vulkan/genX_pipeline.c +++ b/src/intel/vulkan/genX_pipeline.c @@ -1115,7 +1115,7 @@ get_urb_output_offset() return 1; } -static uint32_t +UNUSED static uint32_t get_urb_output_length(const struct anv_shader_bin *bin) { const struct brw_vue_prog_data *prog_data = @@ -1418,7 +1418,7 @@ emit_3dstate_wm(struct anv_pipeline *pipeline, struct anv_subpass *subpass, } } -static bool +UNUSED static bool is_dual_src_blend_factor(VkBlendFactor factor) { return factor == VK_BLEND_FACTOR_SRC1_COLOR || |